Senior Digital Design Architect – AI SoC IP

Tenstorrent; California (MO); Hybrid; USD 180,000 - 240,000; Full time

Benefits offered by this job

Competitive compensation

Job summary

Tenstorrent is seeking a Staff Digital Design Engineer to define, build, and optimize high‑performance IP and SoC architectures for AI workloads. You will work at the intersection of microarchitecture, RTL, and design optimization, shaping future compute platforms.

The role is hybrid, based out of Toronto, Ottawa, Boston, Austin or Santa Clara, with flexibility for applicants across levels and experience. U.S. export compliance applies, and offers align with level.

Qualifications

• Strong background in digital design and computer architecture.
• Proficiency with RTL development (Verilog/VHDL) and ASIC flow knowledge.
• Experience optimizing power, performance, and area (PPA) for high‑end IP/SoC blocks.

Responsibilities

• Architect and implement Tenstorrent custom IP blocks and SoC components.
• Contribute to validation using emulation, FPGA prototyping, or UVM flows.
• Collaborate across design, DV, physical and firmware teams to meet tight deadlines.

Skills

Digital design

RTL Verilog/VHDL

ASIC flows

PPA optimization

Job description

Tenstorrent is seeking a Staff Digital Design Engineer to define, build, and optimize high‑performance IP and SoC architectures for AI workloads. You will work at the intersection of microarchitecture, RTL, and design optimization, shaping future compute platforms.

The role is hybrid, based out of Toronto, Ottawa, Boston, Austin or Santa Clara, with flexibility for applicants across levels and experience. U.S. export compliance applies, and offers align with level.