Senior Digital ASIC Physical Design Engineer

Keysight Technologies SAles Spain SL.; Colorado Springs (CO); On-site; USD 142,000 - 236,000; Full time

Benefits offered by this job

Relocation assistance

Tuition reimbursement

Employee stock programs

Job summary

Keysight Technologies is seeking an experienced Physical Design R&D engineer for ASIC development from RTL to GDS and tapeout. You will handle digital and mixed-signal blocks, coordinate with cross-functional teams, and ensure design quality and timing targets are met.

Responsibilities include floor planning, DFT considerations, sign-off, and collaboration with foundries to deliver reliable GDS. A strong background in electronic design and leadership is essential.

Qualifications

• Industry tapeout experience.
• Strong EE fundamentals with ASIC design, DSP, digital architectures and verification.
• Leadership skills to drive change and influence teams and partners.
• Strong teamwork and written/verbal communication skills.

Responsibilities

• Participate in full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
• Floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification.
• Close sign-off checks, interface with foundries and GDS delivery.
• Work with cross-functional teams to guide architecture with physical design constraints.
• Develop tool flows and drive vendors to achieve milestones.

Skills

Industry tapeout experience

ASIC/ DSP design

Leadership skills

Teamwork

Problem solving

Education

Electrical or Computer Engineering degree

Tools

Innovus

Tempus

Voltus

Genus

Job description

Keysight Technologies is seeking an experienced Physical Design R&D engineer for ASIC development from RTL to GDS and tapeout. You will handle digital and mixed-signal blocks, coordinate with cross-functional teams, and ensure design quality and timing targets are met.

Responsibilities include floor planning, DFT considerations, sign-off, and collaboration with foundries to deliver reliable GDS. A strong background in electronic design and leadership is essential.