Senior Digital ASIC Design & Tapeout Engineer

Keysight Technologies SAles Spain SL.; Colorado Springs (CO); On-site; USD 151,000 - 253,000; Full time

Benefits offered by this job

Medical, dental and vision

401(k) Plan

Tuition Reimbursement

Job summary

Keysight Technologies SAles Spain SL. is seeking an experienced Physical Design R&D engineer in Colorado Springs to lead both module and SoC level implementation from RTL to GDS for digital and mixed signal ASICs.

You will tackle complex design problems, collaborate with cross-functional teams, and drive tool flows while coordinating with foundries to meet milestones and ensure quality and performance.

Qualifications

• Industry tapeout experience.
• Desire to identify and debug problems.
• Experience with task automation and scripting.
• Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures/systems, and verification of large and mixed signal ASIC designs.
• Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity.
• Strong teamwork and written/verbal communication skills.

Responsibilities

• Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
• Responsible for floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification.
• Close sign-off checks, interface with industry foundries and GDS delivery.
• Work extensively with cross functional teams to guide architecture with physical design constraints.
• Develop tool flows and drive vendors to achieve milestones.

Skills

Industry tapeout experience

Problem solving

Automation & scripting

EE fundamentals

Leadership & collaboration

Teamwork & communication

Object-oriented programming

Education

Electrical or Computer Engineering degree

Tools

Innovus

Tempus

Voltus

Genus

Job description

Keysight Technologies SAles Spain SL. is seeking an experienced Physical Design R&D engineer in Colorado Springs to lead both module and SoC level implementation from RTL to GDS for digital and mixed signal ASICs.

You will tackle complex design problems, collaborate with cross-functional teams, and drive tool flows while coordinating with foundries to meet milestones and ensure quality and performance.