Senior DFT Power & Thermal Methodology Architect

NVIDIA Corporation

Santa Clara (CA)

Hybrid

USD 168,000 - 265,000

Full time

14 days+

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Job summary

NVIDIA is seeking a senior member to advance DFT Power, Thermal & Voltage Noise methodologies for state‑of‑the‑art GPU manufacturing tests. You will help push power/thermal limits while partnering with Product Development and Power Architecture to deliver cutting‑edge solutions.

You will also work on post‑silicon data analysis to craft next‑gen approaches and deploy DFT methods using Applied ML & Gen AI. Mentoring junior engineers is part of the role.

Qualifications

  • BSEE (or equivalent experience) with 12+ years in DFT design & power.
  • MSEE with 10+ years in DFT design & power.
  • PhD with 6+ years in DFT design & power.
  • Understanding of DFT topics and VLSI power/timing/voltage noise.
  • Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus.
  • Experience in AI for EDA-related problem-solving is a plus.
  • Excellent knowledge in using statistical tools for data analysis & insights.
  • Exposure to RTL & clocks design, STA, place-n-route and power.
  • Experience in Silicon debug and bring-up on the ATE or SLT platforms.
  • Be able to think like a programmer so that this can be translated into action using AI Coding harnesses

Responsibilities

  • Lead and innovate in DFT Power, Thermal & Voltage Noise Methodology.
  • Develop low power and thermal solutions for manufacturing tests.
  • Collaborate with Product Development & Power Architecture teams.
  • Analyze post-silicon data for power optimizations.
  • Develop DFT methodologies using Applied ML & Gen AI.
  • Mentor junior engineers on test designs and trade-offs.

Skills

DFT design
Power analysis
Thermal analysis
IR drop tools
AI in EDA
Statistics
RTL design
Clocks design
Silicon debug
AI coding harnesses

Education

BSEE (or equivalent experience)
MSEE (or equivalent)
PhD (with 6+ years)

Tools

ATE platforms
SLT platforms

Job description

NVIDIA is seeking a senior member to advance DFT Power, Thermal & Voltage Noise methodologies for state‑of‑the‑art GPU manufacturing tests. You will help push power/thermal limits while partnering with Product Development and Power Architecture to deliver cutting‑edge solutions.

You will also work on post‑silicon data analysis to craft next‑gen approaches and deploy DFT methods using Applied ML & Gen AI. Mentoring junior engineers is part of the role.

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