Senior DFT Power Methodology Engineer

NVIDIA; United States; On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

NVIDIA is seeking a senior engineer to lead DFT Power, Thermal, and Voltage Noise methodology work for cutting-edge manufacturing tests. You will develop low-power thermal solutions and collaborate with Power Architecture to push chip performance under demanding conditions.

The role involves post-silicon data analysis for power and deploying AI-driven DFT solutions. You will mentor junior engineers and contribute to cross-functional design reviews while leveraging Applied ML.

Qualifications

• Deep knowledge of DFT topics and VLSI power, timing, and voltage noise
• Experience with Power Analysis, Thermal Analysis, and IR Drop tools is a plus
• Experience applying AI to EDA-related problems is a plus
• Excellent skills with statistics for data analysis and insights
• Exposure to RTL, clocks, STA, place-n-route, and power
• Experience in silicon debug and bring-up on ATE/SLT platforms
• Ability to think like a programmer and translate concepts into AI tooling actions

Responsibilities

• Inno­vate in DFT Power, Thermal & Voltage Noise Methodology areas.
• Develop groundbreaking low power and thermal solutions for manufacturing tests.
• Collaborate with Product Development & Power Architecture to implement new methodologies on challenging problems.
• Perform post-silicon data analysis for power and architect next-gen solutions.
• Develop and deploy DFT methodologies for next-gen products using Applied ML & Gen AI.
• Mentor junior engineers on test designs and trade-offs including cost and quality

Skills

DFT design

Power analysis

Thermal analysis

IR drop tools

AI for EDA

Statistics and data insights

RTL & clocks design

STA

Place-and-route

Silicon debug & bring-up

Programmatic thinking for AI tools

Education

BSEE or equivalent experience

MSEE

PhD

Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. Make the choice to join us today.

Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions in AI for Chip Design and AI for Predictions in various use cases in manufacturing testing on some of the industry's most complex semiconductor chips.

What you'll be doing:

As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas.

This will include working on groundbreaking low power & thermal solutions for our manufacturing tests to be enabled at conditions that push the boundaries for our datacenter GPUs.

Partner with multi-functional teams including Product Development & Power Architecture, implementing brand-new methodologies on hard-to-solve problems for improving our outgoing quality of chips.

You will work on post-silicon data analysis for power to architect the next-gen solutions.

In addition, you will help develop and deploy DFT methodologies for our next generation products using Applied ML & Gen AI solutions.

Help mentor junior engineers on test designs and trade-offs including cost and quality.

What we need to see:

BSEE (or equivalent experience) with 12+, MSEE with 10+, or PhD with 6+ years of experience in DFT design & power

Understanding of fundamental DFT topics and VLSI areas of power, timing & voltage noise

Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus.

Experience in application of AI for EDA-related problem-solving is a plus.

Excellent knowledge in using statistical tools for data analysis & insights.

Good exposure to multi-functional areas including RTL & clocks design, STA, place-n-route and power.

Experience in Silicon debug and bring-up on the ATE or SLT platforms.

Be able to think like a programmer so that this can be translated into action using AI Coding harnesses

Ways to stand out from the crowd:

Outstanding written and oral communication skills with the curiosity to work on rare challenges.

Experience in managing DFT Power Methodology for designs

Experience in post-silicon debug for thermal & IR Drop

Good understanding of technology and passionate about what you do

Strong collaborative and interpersonal skills, specifically a proven ability to effectively guide and influence within a dynamic environment

NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most forward-thinking and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

• You will also be eligible for equity and benefits

Applications for this job will be accepted at least until September 19, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.