Senior DFT Engineer - Scalable ASIC Test (Hybrid)

Lightmatter; Boston (MA); Hybrid; USD 154,000 - 218,000; Full time

Benefits offered by this job

Retirement matching

Life insurance

Vacation & holidays

Family leave

Disability coverage

Training & development

Flexible hybrid work

Equity grants

Job summary

Lightmatter is leading the revolution in AI data center infrastructure and is seeking a Design for Test Engineer to design, validate, and deploy test solutions for digital, analog, and photonic logic. You will collaborate with RTL and physical-design teams to enable front-end integration and backend bring-up.

The role emphasizes scalable automated flows, silicon bring-up support, and cutting-edge DFT strategies for next-generation ASICs. A strong background in Verilog and DFT tooling is required.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• At least 5 years of industry experience working on DFT-related activities for advanced ASIC designs.
• Experience with scripting languages such as Python or TCL.
• Solid understanding of DFT concepts such as Scan, ATPG, memory test, and JTAG.
• Knowledge of Basic SoC Architecture and HDL languages like Verilog.
• Experience working with commercial EDA DFT tools on MBIST, ATPG, and Boundary Scan.

Responsibilities

• Create new chip, module, and system-level DFT solutions for our highly integrated photonics-based AI platform.
• Develop and deploy DFT methodologies for our next generation products.
• Provide architecture for integrated electronics/analog/digital test including ATPG and boundary scan.
• Work with RTL designers to define front-end integration.
• Work with physical-design engineers to provide backend integration.
• Create automated flow that can scale with the team and company.
• Support initial silicon bring-up through debug.
• Validate DFT implementation and requirements.
• Proactively solve problems while managing deliverables in a fast-paced, evolving environment.

Skills

DFT concepts

Python scripting

TCL scripting

Verilog HDL

MBIST ATPG

Boundary Scan

ASIC design experience

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

EDA DFT tools

MBIST tools

ATPG tools

Boundary Scan tooling

Job description

Lightmatter is leading the revolution in AI data center infrastructure and is seeking a Design for Test Engineer to design, validate, and deploy test solutions for digital, analog, and photonic logic. You will collaborate with RTL and physical-design teams to enable front-end integration and backend bring-up.

The role emphasizes scalable automated flows, silicon bring-up support, and cutting-edge DFT strategies for next-generation ASICs. A strong background in Verilog and DFT tooling is required.