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Blue Origin in the United States is hiring a Senior Verification Engineer for the ASIC & Networking team working on TeraWave, a high-throughput satellite modem and DSP-intensive beamformer with first tapeout targeted for 2027.
You will own verification planning for complex blocks, translate design specs into strategies and goals, choose methods like constrained-random simulation, formal analysis, and directed testing, and help build AI-enabled verification capabilities.
Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
As a Senior Verification Engineer on the ASIC & Networking team, you support TeraWave’s first in-house silicon program, which comprises a high-throughput modem and a DSP-intensive digital beamformer with first tapeout targeted for 2027. Verification strategy, methodology, and infrastructure are being defined now, and you help define them.
The work spans IP, subsystem, and full SoC verification, including CPU subsystems, performance-critical interconnects, security, high-speed peripherals, modem datapath and PHY layers, DSP and beamforming compute, and mixed-signal interfaces. You own a subset of this scope aligned to your background.
The team treats constrained-random simulation, formal methods, and processor-driven SoC testing as equal first-class tools, and is building an AI-enabled verification platform that includes LLM-assisted stimulus and testbench generation, automated regression triage and failure clustering, and data-driven coverage closure. Because none of this is inherited, the engineers who build these capabilities will own them — and grow with the program as it scales.
Background in wireless communications, modem, baseband, and DSP verification is welcome but not required. Architects and modeling engineers support your ramp, and verification judgment and system-level thinking are weighted above domain background.