Senior Design Engineer – DRAM & Mixed-Signal ICs

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 100,000 - 150,000; Full time

Job summary

Micron Technology, Inc. seeks a design engineer in Boise to design, optimize, and verify block‑level circuits for DRAM projects.

You will compare silicon performance with simulations and support correlation activities while collaborating with process integration and modeling teams on new node development. You will partner with global design groups, provide layout guidance through post‑layout simulation, and contribute to a fast‑paced, collaborative environment that values curiosity and strong

Qualifications

• MS or BS in Electrical Engineering and 2–6 years of professional experience.
• Experience with mixed-signal, digital, or analog IC design.
• Experience designing regulators, charge pumps, oscillators, or bandgaps.
• Proficiency with SPICE and Verilog modeling and simulation.
• Experience collaborating with process integration and modeling teams.
• Familiarity with UNIX and Cadence/Synopsys design environments.

Responsibilities

• Design, optimize, and verify block‑level circuits for DRAM projects.
• Compare silicon performance with simulations and support correlation activities.
• Collaborate with process integration and modeling teams on new nodes.
• Partner with global design groups and provide layout guidance through post‑layout sim.

Skills

Block‑level circuit design

Mixed-signal design

Verilog modeling

SPICE simulation

Digital/Analog IC design

Unix/Cadence tooling

GenAI systems experience

Education

MS or BS in Electrical Engineering

Semiconductor design/manufacturing experience 2+ years

Tools

Cadence

Synopsys

Verilog

SPICE

Job description

Micron Technology, Inc. seeks a design engineer in Boise to design, optimize, and verify block‑level circuits for DRAM projects.

You will compare silicon performance with simulations and support correlation activities while collaborating with process integration and modeling teams on new node development. You will partner with global design groups, provide layout guidance through post‑layout simulation, and contribute to a fast‑paced, collaborative environment that values curiosity and strong