Senior Datacenter Compute Accelerator Architect

MediaTek; San Jose (CA); On-site; USD 211,000 - 356,000; Full time

Benefits offered by this job

Health insurance

Life and disability insurance

Savings plan

Company paid holidays

Sick Leave

Vacation time

Parental leave

401K

Job summary

MediaTek is seeking a senior hardware architect for its Data Center team in California. You will drive microarchitecture for tightly-coupled uncore accelerators, and integrate blocks into the coherent interconnect and memory subsystem to meet latency and bandwidth targets for datacenter workloads.

You will collaborate with kernel and driver teams, optimize PPA trade-offs, and lead RTL implementation and silicon bring-up. 8+ years in CPU/Compute or accelerator architecture preferred.

Qualifications

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.
• 8+ years of industry experience in CPU/Compute, SoC, or accelerator architecture for datacenter/server silicon.
• Strong knowledge of hardware acceleration algorithms: Cryptography, Tensor Core, Compression, or high-speed packet processing.
• Deep understanding of on-chip coherent fabrics (AMBA AXI/CHI), memory hierarchy, and caching protocols.
• Solid understanding of hardware virtualization technologies (IOMMU/SMMU, PCIe SR-IOV).
• Proficiency in C/C++ and Python for architectural modeling and data analysis.
• Experience with AI/ML inference offload and NVMe over Fabrics within compute uncore.
• Experience using gem5 or other architectural simulators for pre-silicon validation.

Responsibilities

• Architecture Definition: define microarchitecture and write specs for tightly-coupled uncore accelerators.
• SoC Integration: integrate accelerator blocks into the coherent interconnect and memory subsystem.
• HW/SW Co-Design: define software programming models, APIs, and descriptor formats.
• Virtualization & Security: implement virtualization and integrate with SMMU/IOMMU for secure execution.
• PPA & Performance Trade-offs: analyze power, performance, and area for datacenter workloads.
• Execution Leadership: lead RTL implementation, verification, and silicon bring-up.

Skills

C/C++ programming

Python scripting

Architectural modeling

Education

Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science

Tools

gem5

Architectural simulators

Job description

MediaTek is seeking a senior hardware architect for its Data Center team in California. You will drive microarchitecture for tightly-coupled uncore accelerators, and integrate blocks into the coherent interconnect and memory subsystem to meet latency and bandwidth targets for datacenter workloads.

You will collaborate with kernel and driver teams, optimize PPA trade-offs, and lead RTL implementation and silicon bring-up. 8+ years in CPU/Compute or accelerator architecture preferred.