Senior Cryogenic CMOS Analog Designer

GlobalFoundries; Austin (CA); On-site; USD 118,000 - 275,000; Full time

Job summary

GlobalFoundries is seeking a Senior Analog Design Engineer to develop advanced analog/mixed-signal ICs and reusable IP for cryogenic CMOS and quantum system applications. You will drive designs from architecture to tapeout, coordinating with technology, PDK, modeling, and test teams.

This role requires leadership in design reviews and mentorship. The candidate should have 5+ years in analog/mixed-signal IC design, proficiency in SPICE, layout supervision, and post-layout extraction, and

Qualifications

• Education in electrical engineering or microelectronics with emphasis on analog/mixed-signal design.
• Experience in analog/mixed-signal IC design including schematic, layout, and tapeout.
• Proficiency with SPICE, circuit simulation, and post-layout verification.

Responsibilities

• Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP.
• Own circuit development from architecture through tapeout and silicon validation.
• Perform comprehensive circuit analysis across process, voltage, temperature, and Monte Carlo scenarios.
• Collaborate with device modeling/PDK teams for model accuracy and validation.
• Lead design reviews and mentor engineers.

Skills

CMOS analog design

Schematic design & SPICE

Circuit simulation

Layout supervision

Post-layout extraction

Modeling & verification

Temperature/cryogenic analysis

Python scripting

Team collaboration

Education

Bachelor’s degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or related field

Master’s degree or PhD in Electrical Engineering, Microelectronics, or related field

Tools

SPICE

Analog IC design tools

Layout/DRC/LVS tools

PDK/Process modeling

Job description

GlobalFoundries is seeking a Senior Analog Design Engineer to develop advanced analog/mixed-signal ICs and reusable IP for cryogenic CMOS and quantum system applications. You will drive designs from architecture to tapeout, coordinating with technology, PDK, modeling, and test teams.

This role requires leadership in design reviews and mentorship. The candidate should have 5+ years in analog/mixed-signal IC design, proficiency in SPICE, layout supervision, and post-layout extraction, and