Senior CPU Microarchitecture & RTL Engineer

Apple Inc.; Waltham (MA); On-site; USD 180,000 - 280,000; Full time

Job summary

Apple Inc. in Massachusetts is seeking an experienced CPU Microarchitect/RTL Engineer to lead architecture and RTL development for high-performance cores powering Apple devices. You will own micro-architecture specifications and RTL refinement while collaborating with cross-functional teams to meet timing, power and area goals.

Minimum BS with 10+ years in the field and proficiency in Verilog/VHDL, C/C++, and Python are required. Apple values diversity and equal opportunity in the workplace.

Qualifications

• Minimum BS and 10+ years of relevant industry experience.
• Experience with microprocessor architecture.
• Experience with logic design principles with timing and power implications.
• Experience in Verilog or VHDL.
• Experience with simulators and waveform debugging process.

Responsibilities

• Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
• RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
• Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power

Skills

Microprocessor architecture

Verilog/VHDL

Waveform debugging

C/C++ programming

Python scripting

Education

Bachelor's degree

Tools

Verilog simulators

VHDL simulators

Job description

Apple Inc. in Massachusetts is seeking an experienced CPU Microarchitect/RTL Engineer to lead architecture and RTL development for high-performance cores powering Apple devices. You will own micro-architecture specifications and RTL refinement while collaborating with cross-functional teams to meet timing, power and area goals.

Minimum BS with 10+ years in the field and proficiency in Verilog/VHDL, C/C++, and Python are required. Apple values diversity and equal opportunity in the workplace.