CPU Microarchitect/RTL Engineer

Apple Inc.; Santa Clara (CA); On-site; USD 129,300 - 194,700; Full time

Benefits offered by this job

Medical & dental coverage

Retirement benefits

Employee stock purchase plan

Relocation assistance

Discretionary bonuses

Job summary

Apple Inc. in Santa Clara, CA, is seeking an experienced CPU Microarchitect/RTL Engineer to drive multi-level cache subsystem architecture and RTL development for multi-processor systems.

You will participate in micro-architecture development, RTL ownership, verification, performance exploration, and design delivery with a multi-functional team to meet timing, area, and power goals.

Qualifications

• Experience with Verilog or VHDL for microarchitecture/RTL
• Proficiency in C/C++ programming
• Experience with Python or Perl scripting is a plus

Responsibilities

• Micro-architecture development and specification from high-level ideas to detailed specs
• RTL ownership including development and refinement to meet power/performance/area/timing goals
• Support verification via test benches, formal methods, and simulations
• Performance exploration and verification to ensure RTL meets targets
• Collaborate with multi-functional teams on timing, area, reliability, and power in design delivery

Skills

Verilog or VHDL

C/C++ programming

Python or Perl

Job description

Overview

Santa Clara, California, United States – Hardware. Apple’s Silicon Engineering Group (SEG) designs high-performance, low-power microprocessors powering iPhone, iPad, Watch, Vision Pro, and Mac. We are seeking an experienced engineer to drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.

Description

As a CPU Microarchitect/RTL Engineer, you will participate in:

• Micro-architecture development and specification — from early high-level architectural exploration through micro-architectural research to a detailed specification
• RTL ownership — development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
• Verification — support the verification team in test bench development, formal methods, and simulation/emulation for formal verification
• Performance exploration and correlation — explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery — collaborate with a multi-functional engineering team to implement and verify physical design aspects of timing, area, reliability, testability, and power

Minimum Qualifications

• Experience with at least one of the following languages: Verilog or VHDL

Preferred Qualifications

• Expertise in one or more areas: instruction fetch and decode, branch prediction; instruction scheduling and register renaming, out-of-order execution; integer and floating-point execution; load/store execution; cache and memory subsystems; machine-learning algorithms mapping to hardware; or power and thermal management
• Understanding of low-power microarchitecture techniques
• Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
• Experience in C or C++ programming
• Experience using an interpretive language such as Perl or Python

Compensation and Benefits

Apple’s base pay range for this role is between $129,300 and $194,700, determined by skills, qualifications, experience, and location. Base pay is one part of the total compensation package. Benefits include comprehensive medical and dental coverage, retirement benefits, discounted products and services, and educational reimbursement for career advancement. The role may be eligible for discretionary bonuses or commission payments, as well as relocation assistance. Apple employees also have the opportunity to participate in stock programs and Employee Stock Purchase Plan. Learn more about Apple Benefits.

Note: Benefit, compensation, and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Equal Opportunity and Accessibility

Apple is an equal opportunity employer committed to inclusion and diversity. We promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about EEO rights as an applicant. We believe accessibility is a fundamental human right and strive to ensure an inclusive workplace and tools. Learn about accessibility in Apple’s workplace and reasonable accommodations for job applicants.

Apple accepts applications to this posting on an ongoing basis.