CPU Microarchitect/RTL Engineer

Apple Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. is seeking engineers for CPU architecture and microarchitecture development focused on RTL design for low-power mobile devices. The role involves architecting and developing RTL for next-generation CPUs, with emphasis on timing, power, and area constraints.

Responsibilities include microarchitecture specification, RTL feature ownership, validation, performance exploration, and collaboration with cross-functional teams to deliver design reliable for production.

Qualifications

• Experience with RTL design using Verilog or VHDL.
• Knowledge of timing, power and area tradeoffs in CPU microarchitecture.
• Experience with scripting languages such as Perl or Python.

Responsibilities

• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• RTL feature ownership – development, assessment and refinement of new RTL features to target power, performance, area and timing goals
• Validation - support test bench development and simulation for functional and performance verification
• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
• Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power

Skills

Verilog

VHDL

Tools

Verdi

Job description

Apple’s Silicon Engineering Group (SEG) is hiring dedicated engineers for CPU architecture and microarchitecture development targeted for low power mobile devices. Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an engineer to architect and develop RTL for next generation CPUs.

Description

• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• RTL feature ownership – development, assessment and refinement of new RTL features to target power, performance, area and timing goals
• Validation - support test bench development and simulation for functional and performance verification
• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
• Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power

Minimum Qualifications

• Experience with either Verilog or VHDL

Preferred Qualifications

• Experience with microprocessor architecture
• Experience with simulators and waveform debugging tools such as Verdi
• Knowledge of logic design principles
• Understanding of timing, power and area tradeoffs in CPU microarchitecture
• Understanding of low power and high performance microarchitecture techniques
• Experience using an interpretive language such as Perl or Python

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