Senior Compiler & Toolchain Architect

NUVACORE, Inc.; United States; On-site; CAD 140,000 - 200,000; Full time

Job summary

Nuvacore, Inc. is building ground-up CPU silicon and seeks a Compiler & Toolchain Engineer to strengthen GCC/LLVM backends, core libraries, and runtime environments.

You will implement machine models, chase codegen correctness, and partner with CPU architects to extract peak performance. You will own compiler backend support across ISA, diagnose bugs and regressions, track upstream changes, and influence toolchain architecture.

Qualifications

• Must have 15+ years of professional experience on compiler internals (frontend, middle-end, or backend) in LLVM and/or GCC.
• Strong understanding of backend construction: instruction selection, register allocation, scheduling, and code generation.
• Low-level programming experience targeting x86, ARM, or RISC-V.
• Proven ability debugging functional and performance issues in large software systems.
• Experience with modern automated software development methodologies (CI/CD, automated testing, code review tooling).
• Strong written and verbal communication skills and collaboration across teams.

Responsibilities

• Design, implement, and maintain compiler backend support across GCC and/or LLVM for Nuvacore's ISA.
• Diagnose and resolve codegen correctness bugs and performance regressions in the toolchain.
• Track and integrate upstream LLVM/GCC changes and contribute upstream when beneficial.
• Drive toolchain architecture decisions spanning software/hardware boundaries.
• Optimize performance of system libraries and dynamic language environments.

Skills

Compiler internals

Code generation

Performance optimization

CI/CD

Communication skills

Cross-functional collaboration

Tools

LLVM

GCC

QEMU

Binutils

Job description

Nuvacore, Inc. is building ground-up CPU silicon and seeks a Compiler & Toolchain Engineer to strengthen GCC/LLVM backends, core libraries, and runtime environments.

You will implement machine models, chase codegen correctness, and partner with CPU architects to extract peak performance. You will own compiler backend support across ISA, diagnose bugs and regressions, track upstream changes, and influence toolchain architecture.