Senior CMOS RFIC Design Engineer — Lead RF Blocks & Debug

Broadcom; Irvine (CA); On-site; USD 109,700 - 175,500; Full time

Job summary

Broadcom is seeking a CMOS RFIC Design Engineer to design, develop, and productize RF building blocks in CMOS processes. You will provide technical leadership across product definition, architecture, system and transistor-level circuit design, layout supervision, lab debug, and production support.

You will collaborate with test, product, system, modeling, and application engineers to deliver high‑quality RF solutions for wireless connectivity applications.

Qualifications

• Master’s or PhD with relevant experience in RFIC design in CMOS.
• Strong skills in Cadence simulations and lab debugging.
• Experience with RF tuning and RF measurement instrumentation.

Responsibilities

• Design, develop, and productize RF building blocks in CMOS processes.
• Provide technical leadership across definition, architecture, circuit design, layout, and production support.
• Collaborate with test, product, system, modeling, and application engineers.

Skills

RFIC design

Cadence

lab debugging

RF tuning

cross-functional collaboration

Education

Master's degree

PhD

Tools

Cadence Design Environment

Job description

Broadcom is seeking a CMOS RFIC Design Engineer to design, develop, and productize RF building blocks in CMOS processes. You will provide technical leadership across product definition, architecture, system and transistor-level circuit design, layout supervision, lab debug, and production support.

You will collaborate with test, product, system, modeling, and application engineers to deliver high‑quality RF solutions for wireless connectivity applications.