Senior Cell Modeling & Verification Engineer - Equity

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 136,000 - 218,500; Full time

Job summary

NVIDIA Gruppe is seeking a Senior Cell Modeling and Verification Engineer in Santa Clara, CA, to develop ASIC products and ensure design quality. Candidates should have experience in circuit and digital design, Verilog, SystemVerilog, and scripting languages.

The role requires collaboration within cross-functional teams, delivering high-performance RTL models for NVIDIA's innovative technologies. The position offers a competitive salary range of 136,000 USD - 218,500 USD and eligibility for equity and benefits.

Qualifications

• 3+ years of relevant experience.
• Hands-on experience with RTL simulation and waveform debug.
• Strong understanding of Verilog HDL.

Responsibilities

• Develop behavioral model and verification for custom mixed signal design cells.
• Collaborate with cross-functional teams on library build and ASIC verification.
• Document and deliver high-performance RTL.

Skills

Verilog HDL

Scripting (Python, Perl)

RTL simulation

Digital design concepts

Education

Bachelor's or Master's in Electrical Engineering or Computer Engineering

Job description

NVIDIA Gruppe is seeking a Senior Cell Modeling and Verification Engineer in Santa Clara, CA, to develop ASIC products and ensure design quality. Candidates should have experience in circuit and digital design, Verilog, SystemVerilog, and scripting languages.

The role requires collaboration within cross-functional teams, delivering high-performance RTL models for NVIDIA's innovative technologies. The position offers a competitive salary range of 136,000 USD - 218,500 USD and eligibility for equity and benefits.