Senior CAD Engineer, ASIC Development Infrastructure, RTL Design

WarmStart Ltd; Boise, Northern (ID, KY); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Amazon Lab126 is seeking a Senior CAD Engineer to lead ASIC development flows from RTL to GDSII and to deploy multi-vendor EDA tools across compute infrastructure.

You will develop automation, CI/CD pipelines, and tooling to streamline design tasks, while collaborating with IT and vendor teams to optimize performance and reliability. Strong Verilog/SystemVerilog, Python, and CAD infrastructure experience are required.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 5+ years building and supporting CAD infrastructure for ASIC development.
• Knowledge of Python and Embedded C programming.
• Ability to write and understand Verilog and SystemVerilog.
• Experience with version control systems and CI/CD pipeline implementation.
• Experience leading technical initiatives and key deliverables.
• Experience supporting deployment of ASIC tools (e.g., Verilog simulation, synthesis, place and route, and license management).

Responsibilities

• Design and maintain ASIC development flows from RTL to GDSII.
• Deploy and configure EDA tools across compute infrastructure.
• Develop automation and CI/CD/regression to streamline design tasks and improve consistency.
• Troubleshoot tool issues and collaborate with vendors to resolve bugs and performance bottlenecks.
• Work with IT teams to optimize compute and storage strategies for enhanced engineering efficiency.
• Create and maintain documentation for tool usage, flow methodologies, and best practices.
• Utilize AI tools to accelerate troubleshooting and monitoring of design flows.

Skills

Verilog

SystemVerilog

Python

Embedded C

RTL coding

EDA tools

CI/CD

Version control

Scripting

ASIC design infrastructure

Education

Bachelor's degree in Electrical Engineering

Tools

Synopsys

Cadence

Mentor/Siemens

Job description

Amazon Lab126 is a research and development company focused on creating innovative consumer electronics, including the Kindle, Fire tablets, Fire TV, and Amazon Echo. We are seeking a Senior Computer Aided Design (CAD) Engineer to join our advanced ASIC development team, responsible for semiconductor designs that will power millions of Amazon devices.

Responsibilities:

• Design and maintain ASIC development flows from RTL to GDSII, including RTL generation, simulation, synthesis, place & route, timing analysis, DRC/LVS, and sign-off.
• Deploy and configure EDA tools from vendors (Synopsys, Cadence, Mentor/Siemens) across compute infrastructure.
• Develop automation and CI/CD/regression to streamline design tasks and improve consistency.
• Troubleshoot tool issues and collaborate with vendors to resolve bugs and performance bottlenecks.
• Work with IT teams to optimize compute and storage strategies for enhanced engineering efficiency.
• Create and maintain documentation for tool usage, flow methodologies, and best practices.
• Utilize AI tools to accelerate troubleshooting and monitoring of design flows.

Qualifications:

• Bachelor's degree in Electrical Engineering or a related field.
• 5+ years of experience building and supporting CAD infrastructure for ASIC development.
• Knowledge of Python and Embedded C programming.
• Ability to write and understand Verilog and SystemVerilog.
• Experience with version control systems and CI/CD pipeline implementation.
• Experience leading technical initiatives and key deliverables.
• Experience supporting deployment of ASIC tools (e.g., Verilog simulation, synthesis, place and route, and license management).

Skills:

• Knowledge of scripting languages (bash, python, etc.).
• Experience in RTL coding and debug, performance, power, area analysis and trade-offs.
• Familiarity with documentation automation tools for generating technical specifications.
• Experience using dashboarding tools for exploration and presentation, connected to real data sources.