Memory Management ASIC Verification Engineer - New Grads

NVIDIA; Madison (AL); On-site; USD 100,000 - 190,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA seeks a New College Graduate Verification Engineer to join our Memory Management Unit team in the U.S. You will verify GPU architectures, build testbenches, and drive coverage with a strong emphasis on SystemVerilog and C/C++.

Collaborate with architects, designers, and software teams across sites while maturing verification methodologies and reusable components. The role requires a BS/MS in a related field, experience with verification tools, and strong debugging skills.

Qualifications

• Pursuing or recently completed BS or MS in Electrical Engineering, Computer Science, Computer Engineering or related field
• Exposure to Computer Architecture, ASIC design and verification methodology is required
• Strong proficiency with SystemVerilog, C and/or C++, test planning, coverage closure, and creating reusable verification components.
• Knowledgeable in constrained random testing with functional coverage and assertion-based verification
• Understanding of object oriented programming concepts
• Exposure to simulation tools like VCS, IES and debug tools like Debussy, GDB
• Good debugging and problem solving skills

Responsibilities

• Define verification scope for Memory Management Unit and verify design correctness
• Develop verification infrastructure (testbenches, BFMs, checkers, monitors) and create test/coverage plans
• Collaborate with architects, designers and software engineers across sites
• Plan and advance methodology for the testbench

Skills

SystemVerilog

C/C++

Test planning

UVM

Debugging

OOP concepts

Education

BS or MS in Electrical Engineering / CS

Tools

VCS

IES

Debussy

GDB

Job description

NVIDIA seeks a New College Graduate Verification Engineer to join our Memory Management Unit team in the U.S. You will verify GPU architectures, build testbenches, and drive coverage with a strong emphasis on SystemVerilog and C/C++.

Collaborate with architects, designers, and software teams across sites while maturing verification methodologies and reusable components. The role requires a BS/MS in a related field, experience with verification tools, and strong debugging skills.