Senior ASIC Verification Engineer – Inference Accelerator

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 168,000 - 311,000; Full time

Job summary

NVIDIA Corporation in Santa Clara, CA is seeking a Senior ASIC Design Verification Engineer to verify the design and implementation of the world’s leading inference accelerator for AI and autonomous systems. You will work with SystemVerilog/UVM, VCS/Verdi, and develop automated verification flows, collaborating with architects and silicon teams.

Join a team driving cutting-edge GPU and AI technologies, with opportunities to shape verification methodologies and contribute to high-impact projects

Qualifications

• Bachelor's Degree in EE, CS or CE (or equivalent experience)
• 8+ years of relevant industry verification experience
• Experience with random stimulus, functional coverage, assertion-based verification
• Proficiency in SystemVerilog and UVM; familiarity with VCS/Verdi and debugging

Responsibilities

• Verify the design and implementation of the inference accelerator ASIC
• Develop and maintain verification infrastructure and testbenches
• Collaborate with architects, designers, and pre-/post-silicon verification teams
• Create and optimize automated verification flows to improve productivity

Skills

SystemVerilog

UVM

Debugging & analysis

C/C++ programming

Python/Perl

Education

Bachelor's degree in EE/CS/CE

Tools

VCS

Verdi

UPF

DFT tools

Job description

NVIDIA Corporation in Santa Clara, CA is seeking a Senior ASIC Design Verification Engineer to verify the design and implementation of the world’s leading inference accelerator for AI and autonomous systems. You will work with SystemVerilog/UVM, VCS/Verdi, and develop automated verification flows, collaborating with architects and silicon teams.

Join a team driving cutting-edge GPU and AI technologies, with opportunities to shape verification methodologies and contribute to high-impact projects