Senior ASIC Verification Infra & Automation Engineer

NVIDIA; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA seeks a Senior ASIC Compose Verification Infrastructure and Tools Engineer to advance AI-enabled verification flows and build automation across ASIC IP projects in Santa Clara. You’ll work with RTL, verification, firmware, and infrastructure teams to improve CI, debug, and qualification.

The role emphasizes pre-silicon verification, SystemVerilog, Python scripting, and scalable tooling. Equity and benefits accompany a strong, collaborative engineering culture at NVIDIA.

Qualifications

• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
• 5+ years of relevant industry experience.
• Strong understanding of ASIC development workflows, including builds, simulation, regressions, debug, integration, and qualification.
• Experience with verification methodology such as UVM or similar.
• Strong working knowledge of Verilog/SystemVerilog, including RTL development or pre-silicon verification/debug experience.
• Exposure to industry simulation and debug tools such as VCS, Verdi, Xcelium, or similar.
• Strong programming skills in Python, Perl, or another scripting/systems programming language.
• Experience with SystemVerilog and object-oriented verification environments.
• Strong root-cause analysis skills, especially for intermittent or hard-to-isolate infrastructure failures.
• Self-directed execution: ability to take a loosely defined technical problem, investigate across domains, and deliver a working solution.

Responsibilities

• Apply practical AI workflows where they build leverage, including debug assistance, run triage, summarization, documentation, and workflow automation.
• Build and improve high-speed IO integration, build, simulation, and pre-submit qualification flows for large ASIC IP development.
• Improve CI reliability, turnaround time, debuggability, and scalability across distributed compute environments.
• Root-cause complex failures across development, verification, build systems, tools, infrastructure, and compute environments.
• Turn recurring integration or qualification difficulties into durable automation and process improvements.
• Define, publish, and actively use metrics for integration latency, flow health, failure trends, and engineering efficiency.
• Bring metrics into engineering discussions to guide priorities, forecast risk, and optimize the systems we operate.
• Collaborate with ASIC designers, verification engineers, firmware engineers, methodology teams, and infrastructure partners.
• Dive into unfamiliar technical areas, understand how the system works end to end, and drive ambiguous problems to closure.

Skills

AI workflows

CI automation

Verilog/SystemVerilog

Python scripting

UVM verification

Root-cause analysis

Pre-silicon verification

Debug tooling

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

VCS

Verdi

Xcelium

Job description

NVIDIA seeks a Senior ASIC Compose Verification Infrastructure and Tools Engineer to advance AI-enabled verification flows and build automation across ASIC IP projects in Santa Clara. You’ll work with RTL, verification, firmware, and infrastructure teams to improve CI, debug, and qualification.

The role emphasizes pre-silicon verification, SystemVerilog, Python scripting, and scalable tooling. Equity and benefits accompany a strong, collaborative engineering culture at NVIDIA.