Senior ASIC Verification Engineer: Inference Accelerator

NVIDIA; Austin (TX); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

NVIDIA seeks best-in-class ASIC Verification Engineers to verify the design and implementation of the world's leading inference accelerator. This role offers impact across NVIDIA's product lines, from consumer graphics to self-driving systems and AI.

You will work with a team of experts to build verification infrastructure, using SystemVerilog/UVM, and collaborating with silicon teams to ensure correctness and efficiency in verification workflows.

Qualifications

• Bachelor's degree in EE, CS or CE with 8+ years of industry experience.
• Experience building block and SoC level testbenches with strong debugging.
• Experience with random stimulus, functional coverage and assertion-based verification.
• Expertise in SystemVerilog and UVM.
• Experience with VCS and Verdi; knowledge of UPF/DFT is a plus.
• Familiarity with ASIC design flow and ML applications in verification.

Responsibilities

• Verify the design and implementation of inference accelerator.
• Verify ASIC design, architecture, reference models and micro-architecture.
• Define verification scope, develop infrastructure and verify correctness of the design.
• Collaborate with architects, designers and verification teams across silicons.
• Implement and optimize automated verification flows to boost productivity.
• Stay updated on ASIC verification trends and apply innovative techniques.

Skills

SystemVerilog

UVM

C/C++

Python/Perl

Debugging

Education

Bachelor's Degree in EE/CS/CE

Tools

VCS

Verdi

UPF Power verification

DFT verification

CI tooling

Job description

NVIDIA seeks best-in-class ASIC Verification Engineers to verify the design and implementation of the world's leading inference accelerator. This role offers impact across NVIDIA's product lines, from consumer graphics to self-driving systems and AI.

You will work with a team of experts to build verification infrastructure, using SystemVerilog/UVM, and collaborating with silicon teams to ensure correctness and efficiency in verification workflows.