Senior ASIC Verification Engineer - AI Inference

NVIDIA; Durham (NC); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. You will build high-performance processor elements for programmable compute and graphics, collaborating across teams to verify design correctness and optimize verification flows.

Eligible candidates have a Bachelors in EE/CS/CE and 8+ years of industry experience, with expertise in SystemVerilog, UVM, and verification tools.

Qualifications

• Bachelor's degree in EE, CS or CE with 8+ years of experience.
• Testbench development for block and SoC level verification with debugging skills.
• Experience with random stimulus, functional coverage and assertions.
• SystemVerilog and UVM expertise.
• Design/verification tools VCS and Verdi or equivalent.
• UPF power verification experience is a plus.
• Netlist/DFT verification experience is a plus.
• Perl/Python and C/C++ programming desirable.
• Knowledge of ASIC design flow from spec to GDS.
• Knowledge of applying ML to ASIC verification flow.

Responsibilities

• Verify design and implementation of inference accelerator.
• Verify ASIC design, architecture, reference models and micro-architecture.
• Define verification scope, develop infrastructure, ensure correctness.
• Collaborate with architects, designers, and verification teams.
• Implement and optimize automated verification flows.
• Keep up with ASIC verification trends and apply new techniques.

Skills

SystemVerilog

UVM

ASIC verification

Verdi

VCS

Perl/Python

C/C++

DFT verification

UPF power verification

Education

Bachelor's degree in EE/CS/CE

Tools

VCS

Verdi

UPF

Job description

NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. You will build high-performance processor elements for programmable compute and graphics, collaborating across teams to verify design correctness and optimize verification flows.

Eligible candidates have a Bachelors in EE/CS/CE and 8+ years of industry experience, with expertise in SystemVerilog, UVM, and verification tools.