Senior ASIC/SoC Verification Engineer

itD Tech; Toadtown (CA); On-site; USD 47,000 - 56,000; Full time

Benefits offered by this job

Medical benefits

401(k) plan

Paid holidays

Job summary

itD is seeking a Verification Engineer to support the development and verification of next-generation SoC solutions. The candidate should have 5-12 years of design verification experience with expertise in UVM, SystemVerilog, and ASIC/SoC verification.

Location is 100% onsite in Allentown, PA or Carlsbad, CA. Pay ranges are PA $34.00-$34.20/hr and CA $41.00-$41.40/hr, depending on experience. The role includes medical benefits, a 401(k) plan, paid holidays, and more.

Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• 5-12 years of ASIC or SoC design verification experience.
• Strong experience developing UVM-based testbenches.
• Proficiency with SystemVerilog.
• Experience creating verification plans and verification infrastructure.
• Knowledge of block- and system-level verification methodologies.
• Experience with timing and gate-level simulation.
• Experience debugging complex design and verification issues.
• C programming experience for firmware development supporting post-silicon bring-up.

Responsibilities

• Develop and maintain UVM-based verification environments for ASIC/SoC designs.
• Create and execute block- and system-level verification plans.
• Design verification components, including assertions, agents, traffic generators, and scoreboards.
• Partner with cross-functional engineering teams to define verification strategies and improve design testability.
• Debug and resolve complex design and verification issues throughout the development lifecycle.
• Perform timing and gate-level simulations to validate design functionality.
• Support post-silicon bring-up through C-based firmware development and verification activities.

Skills

UVM-based verification

SystemVerilog

ASIC/SoC verification

C for firmware

Debugging complex designs

Timing simulations

Verification plan creation

Education

Bachelor's degree in Electrical Engineering

Tools

Python

Perl

Job description

itD is seeking a Verification Engineer to support the development and verification of next-generation SoC solutions. The candidate should have 5-12 years of design verification experience with expertise in UVM, SystemVerilog, and ASIC/SoC verification.

Location is 100% onsite in Allentown, PA or Carlsbad, CA. Pay ranges are PA $34.00-$34.20/hr and CA $41.00-$41.40/hr, depending on experience. The role includes medical benefits, a 401(k) plan, paid holidays, and more.