Senior ASIC Physical Design Engineer - Space Comm

Amazon

Austin (TX)

On-site

USD 159,000 - 215,000

Full time

48 hours ago
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Benefits offered by this job

RSUs
401(k) matching
Paid time off

Job summary

Amazon Kuiper Manufacturing Enterprises LLC in Austin, TX is seeking a senior ASIC implementation engineer to lead architectural feasibility studies and drive physical design closures for high-speed satellite communications ASICs. You will collaborate with RTL/Arch teams, evaluate third-party IP, and guide power-performance tradeoffs in deep sub-micron nodes.

The role requires 7+ years in ASIC implementation, a Bachelor's degree in Electrical Engineering or related field, and ideally a Master's

Qualifications

  • Bachelor's degree in Electrical Engineering or a related field.
  • 7+ years of experience in ASIC implementation, i.e., synthesis, STA and working with DFT, P&R for deep sub-micron nodes.

Responsibilities

  • Work with RTL/logic designers to drive architectural feasibility studies and explore power-performance-area tradeoffs for physical design closure.
  • Drive IO/Core block physical implementation through synthesis, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off.
  • Develop physical design methodologies while embracing AI flow.
  • Evaluate 3rd party IP and provide recommendations.
  • Be a highly-valued member of our start-up-like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch teams.

Skills

ASIC implementation

Education

Bachelor's degree in Electrical Engineering or related field
Master's degree in Electrical or Communications Engineering or related field

Job description

Amazon Kuiper Manufacturing Enterprises LLC in Austin, TX is seeking a senior ASIC implementation engineer to lead architectural feasibility studies and drive physical design closures for high-speed satellite communications ASICs. You will collaborate with RTL/Arch teams, evaluate third-party IP, and guide power-performance tradeoffs in deep sub-micron nodes.

The role requires 7+ years in ASIC implementation, a Bachelor's degree in Electrical Engineering or related field, and ideally a Master's

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