Senior ASIC Fabric Interconnect Design Engineer

Apple Inc.; Austin (TX); On-site; USD 150,000 - 230,000; Full time

Job summary

A leading technology company is seeking a highly experienced design engineer to develop and integrate complex chip designs. You will be responsible for owning all aspects of RTL development and collaborate with cross-functional teams to ensure timely delivery of high-quality components. The ideal candidate has a Bachelor's degree with 10+ years of relevant experience, particularly in chip design and system memory hierarchy. This role offers a dynamic work environment in Austin, Texas.

Qualifications

• Minimum of BS + 10 years of relevant industry experience.
• Strong experience collaborating with diverse teams.

Responsibilities

• Design and integrate interconnect fabrics for SoCs.
• Own RTL development design and generation.
• Ensure high-quality designs are delivered on time.

Skills

Experience in chip design

Knowledge of cache coherency protocols

Strong interpersonal skills

Experience with synthesis tools

Project management skills

Education

Bachelor's degree in relevant field

Tools

Front-end design tools

Job description

A leading technology company is seeking a highly experienced design engineer to develop and integrate complex chip designs. You will be responsible for owning all aspects of RTL development and collaborate with cross-functional teams to ensure timely delivery of high-quality components. The ideal candidate has a Bachelor's degree with 10+ years of relevant experience, particularly in chip design and system memory hierarchy. This role offers a dynamic work environment in Austin, Texas.