Don’t send a generic resume — generate a resume and cover letter tailored to this exact role.
Synopsys is seeking a seasoned ASIC/SoC/Chiplet Architect, Manager, or Design Engineer to lead advanced IC Digital, Mixed Signal, or Analog design efforts. You will translate complex engineering concepts into impactful solutions, engage customers, and drive architecture choices across global teams in a fast-paced environment.
Bachelor’s 10+ years or Master’s 8+ years in a relevant field is required, with strong communication and program management skills.
Synopsys is seeking a seasoned ASIC/SoC/Chiplet Architect, Manager, or Design Engineer to lead advanced IC Digital, Mixed Signal, or Analog design efforts. You will translate complex engineering concepts into impactful solutions, engage customers, and drive architecture choices across global teams in a fast-paced environment.
Bachelor’s 10+ years or Master’s 8+ years in a relevant field is required, with strong communication and program management skills.