Senior ASIC Design Engineer

Anysilicon; Austin (TX); Hybrid; USD 120,000 - 170,000; Full time

Job summary

Atom Computing is seeking a Senior ASIC Designer in Austin, TX or Boulder, CO to design DSP blocks for quantum systems. You will perform hands-on ASIC work from microarchitecture through RTL, collaborating with physicists, optical engineers, and software engineers to deliver hardware solutions.

The role requires strong DSP/RTL expertise, experience with large DSP blocks in RTL, and familiarity with Cadence, Synopsys, or Siemens EDA tools. FPGA/processor design background is a plus.

Qualifications

• MS or PhD in Electrical Engineering or related field.
• 5+ years of post-degree experience as a hardware engineer.
• Experience in a complete ASIC design cycle.

Responsibilities

• Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
• Collaborate with quantum physicists, optical engineers, and software engineers to understand use cases and deliver hardware solutions.
• Participate in the design and development of current FPGA designs, influencing the process to prepare for ASIC design.

Skills

Digital signal processing

RTL

DSP blocks in RTL

FPGA/microprocessor design

Education

MS or PhD in Electrical Engineering

Tools

Cadence

Synopsys

Siemens EDA

Job description

Atom Computing is at the forefront of quantum computing, utilizing optically trapped neutral atoms to create groundbreaking computational systems. We are looking for a Senior ASIC Designer to join our innovative team in Austin, TX or Boulder, CO, where you will play a crucial role in designing and developing digital signal processing (DSP) blocks for our quantum computing systems.

Responsibilities:

• Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
• Collaborate with quantum physicists, optical engineers, and software engineers to understand use cases and deliver hardware solutions.
• Participate in the design and development of current FPGA designs, influencing the process to prepare for ASIC design.

Qualifications:

• MS or PhD in Electrical Engineering or a related field.
• 5+ years of post-degree experience as a hardware engineer.
• Experience in a complete ASIC design cycle.

Skills:

• Expertise in digital signal processing algorithms.
• Proficiency with RTL (SystemVerilog preferred).
• Experience in implementing large digital signal processing blocks in RTL.
• Knowledge of Cadence, Synopsys, or Siemens EDA design tools.
• Expertise in FPGA, microprocessor, and related digital circuit design.