Senior ASIC Chip Architect – Mixed Signal

Illumina; United States; Remote; USD 167,000 - 251,000; Full time

Job summary

Illumina seeks a Senior Chip Architect specializing in mixed-signal systems to influence our next-generation products. You will lead architectural vision and collaborate with cross-functional teams to deliver innovative solutions. This role requires advanced expertise in ASIC design and a passion for problem-solving in cutting-edge technology.

Benefits

Access to genomics sequencing

Health/dental/vision benefits

Retirement benefits

Paid time off

Qualifications

• 10+ years of experience in ASIC/SoC development with at least 5 years in a lead or architect role.
• Deep expertise in mixed-signal design including experience with Op Amps, ADC’s, PLL’s.
• Track record of delivering silicon to production.

Responsibilities

• Define and drive architectural vision for complex ASICs.
• Collaborate with cross-functional stakeholders to translate requirements.
• Evaluate trade-offs to optimize chip architecture.

Skills

Mixed-signal design

Analog circuit design

Collaboration

Problem-solving

Leadership

Education

PhD in electrical engineering

MS with equivalent experience

Tools

EDA tools (Cadence, Mentor, Synopsys)

Job description

What if the work you did every day could impact the lives of people you know? Or all of humanity?

At Illumina, we are expanding access to genomic technology to realize health equity for billions of people around the world. Our efforts enable life-changing discoveries that are transforming human health through the early detection and diagnosis of diseases and new treatment options for patients. Working at Illumina means being part of something bigger than yourself. Every person, in every role, has the opportunity to make a difference. Surrounded by extraordinary people, inspiring leaders, and world changing projects, you will do more and become more than you ever thought possible.

At Illumina, our mission is to unlock the power of the human genome. We are seeking a highly experienced Senior Chip Architect with an emphasis on mixed-signal systems to help drive the delivery of our next-generation products. This role is a key contributor to the future vision of our product roadmap. The ideal candidate will have both depth and breadth of experience in mixed-signal ASIC design. Creativity and passion for solving difficult problems in cross-disciplinary teams are crucial.

Responsibilities Include:

• Define and drive architectural vision and technical roadmaps for complex ASICs.
• Collaborate with cross-functional stakeholders and SMEs to understand requirements, translating them into a list of specifications.
• Align with system-level teams across multiple domains, including analog, digital, compute, and software to ensure successful integration of deliverables.
• Evaluate trade-offs between performance, power, area, and cost to optimize chip architecture.
• Lead reviews of high-level design specifications, block diagrams and interface definitions.
• Identifying and engaging design partners.
• Lead with a philosophy of DfT and DfM, helping to define test structures and processes that lead to a robust, cost-optimized, and high-confidence supply chain.
• Oversee the development process from feasibility through qualification, proactively managing to get ahead of challenges.
• Support FA teams to identify root causes of failures.

Required Education and Experience

• PhD in electrical engineering or MS with equivalent experience
• 10+ years of experience in ASIC/SoC development with at least 5 years in a lead or architect role.
• Deep expertise in mixed-signal design including experience with Op Amps, ADC’s, PLL’s, SerDes, or similar fundamental building blocks.
• Strong fundamentals of analog circuit design including SNR, noise, gain-BW, stability, PSRR, etc.
• Experience with chip-level integration, floorplanning, and timing/power closure.
• Experience with industry-standard EDA tools and design flows (Cadence, Mentor, Synopsys, etc.)
• Proven track record of delivering silicon to production.
• Excellent communication, leadership, and collaboration skills.

Preferred Education and Experience

• Experience with high-speed interfaces (e.g. PCI, DDR, LVDS, MIPI)
• Experience designing image sensor analog front-end design, including ADC, Bandgap circuit, DAC, bias circuits etc.
• Knowledge of digital design approaches and RTL development using Verilog, SystemVerilog, VHDL or equivalent.
• Knowledge of firmware/hardware co-design considerations
• Experience coordinating with devices requiring post-CMOS processing (e.g. MEMS, biochips)
• Experience with characterization and validation of 2D/images sensors is a plus
• Knowledge of SoC and peripheral interface: MIPI, USB, I2C, SPI.
• Track record of innovation

#LI-ONSITE

The estimated base salary range for the Senior ASIC Chip Architect – Mixed Signal role based in the United States of America is: $167,200 - $250,800. Should the level or location of the role change during the hiring process, the applicable base pay range may be updated accordingly. Compensation decisions are dependent on several factors including, but not limited to, an individual’s qualifications, location where the role is to be performed, internal equity, and alignment with market data. Additionally, all employees are eligible for one of our variable cash programs (bonus or commission) and eligible roles may receive equity as part of the compensation package. We offer a wide range of benefits as innovative as our work, including access to genomics sequencing, family planning, health/dental/vision, retirement benefits, and paid time off.
We are a company deeply rooted in belonging, promoting an inclusive environment where employees feel valued and empowered to contribute to our mission. Built on a strong foundation, Illumina has always prioritized openness, collaboration, and seeking alternative perspectives to propel innovation in genomics. We are proud to confirm a zero-net gap in pay, regardless of gender, ethnicity, or race. We also have several Employee Resource Groups (ERG) that deliver career development experiences, increase cultural awareness, and offer opportunities to engage in social responsibility. We are proud to be an equal opportunity employer committed to providing employment opportunity regardless of sex, race, creed, color, gender, religion, marital status, domestic partner status, age, national origin or ancestry, physical or mental disability, medical condition, sexual orientation, pregnancy, military or veteran status, citizenship status, and genetic information. Illumina conducts background checks on applicants for whom a conditional offer of employment has been made. Qualified applicants with arrest or conviction records will be considered for employment in accordance with applicable local, state, and federal laws. Background check results may potentially result in the withdrawal of a conditional offer of employment. The background check process and any decisions made as a result shall be made in accordance with all applicable local, state, and federal laws. Illumina prohibits the use of generative artificial intelligence (AI) in the application and interview process. If you require accommodation to complete the application or interview process, please contact [e-mail]. To learn more, visit: https://www.dol.gov/ofccp/regs/compliance/posters/pdf/eeopost.pdf. The position will be posted until a final candidate is selected or the requisition has a sufficient number of qualified applicants. This role is not eligible for visa sponsorship.