Senior Analog Methodology Lead – AI-Driven IP

Synopsys, Inc.; Boxborough (MA); On-site; USD 180,000 - 240,000; Full time

Job summary

Synopsys, Inc. is seeking an experienced Analog Methodology Engineer to lead cross-domain coordination for analog and adjacent engineering workflows.

You will own methodology areas, translate customer requirements into integration solutions, and drive adoption across product teams and foundries. You will influence executive leadership by aligning strategy with execution, mentor engineers, and apply AI to optimize flows in silicon IP development for workload-specific architectures.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or similar technical field; MSEE or PhD preferred.
• 18-25 years of IC design experience with a BSEE degree, or 15-18 years with an MSEE or PhD.
• Extensive expertise in analog and mixed-signal methodology, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration.
• Proficiency in scripting and automation to prototype flows; ability to apply AI where useful.
• Technical lead for customer methodology requirements and integration solutions.

Responsibilities

• Provide clear ownership for analog and adjacent-domain methodology areas.
• Act as focal point for customer-driven methodology requirements and integration challenges.
• Be accountable for prioritization, adoption, stakeholder engagement, and execution.
• Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries.
• Support methodology for application-optimized IP and the special-purpose silicon customers are building for specific workloads and system architectures.

Skills

Analog/mixed-signal design

Circuit-to-layout

Circuit-to-timing

Si/PI integration

Scripting & automation

AI in flows

Technical leadership

Customer engagement

Education

BSEE degree

MSEE or PhD

Job description

Synopsys, Inc. is seeking an experienced Analog Methodology Engineer to lead cross-domain coordination for analog and adjacent engineering workflows.

You will own methodology areas, translate customer requirements into integration solutions, and drive adoption across product teams and foundries. You will influence executive leadership by aligning strategy with execution, mentor engineers, and apply AI to optimize flows in silicon IP development for workload-specific architectures.