Senior Analog Methodology Architect for AI-Optimized IP

Synopsys, Inc.; Boxborough (MA); In loco; USD 180.000 - 280.000; Tempo pieno

Descrizione del lavoro

Synopsys, Inc. in Massachusetts seeks an experienced Analog Methodology Engineer to lead cross-domain methodology adoption for analog-to-layout and timing flows. You will drive customer requirements into integrated solutions and mentor teams across product groups and foundries.

You will apply AI/ML techniques to optimize analog design processes, contribute to silicon IP release strategies, and collaborate with customers to shape methodology roadmaps for state-of-the-art mixed-signal systems.

Competenze

• Bachelor's degree in Electrical Engineering, Computer Engineering, or similar technical field; advanced degree preferred.
• 18–25 years IC design experience with BSEE or 15–18 years with MSEE/PhD.
• Extensive analog/mixed-signal methodology expertise across workflow gaps.

Mansioni

• Own analog and adjacent-domain methodology areas end-to-end.
• Gather customer requirements and drive integration solutions.
• Prioritize work, engage stakeholders, and execute plans.
• Coordinate across product teams and foundries to accelerate adoption.
• Support application-optimized IP and specialty silicon workflows.

Conoscenze

Analog/mixed-signal design

Transistor-level simulation

STA/Timing analysis

Reliability analysis

Scripting/Automation

AI/ML for analog

Customer engagement

Methodology ownership

Team collaboration

CMOS fundamentals

Formazione

Bachelor's degree in Electrical Engineering or related field

MSEE or PhD preferred

Strumenti

SPICE

Circuit-to-layout tools

Scripting languages

Descrizione del lavoro

Synopsys, Inc. in Massachusetts seeks an experienced Analog Methodology Engineer to lead cross-domain methodology adoption for analog-to-layout and timing flows. You will drive customer requirements into integrated solutions and mentor teams across product groups and foundries.

You will apply AI/ML techniques to optimize analog design processes, contribute to silicon IP release strategies, and collaborate with customers to shape methodology roadmaps for state-of-the-art mixed-signal systems.