Senior Analog Layout Engineer – High-Speed ICs (Remote)

Arrow Electronics, Inc.; Oregon; Hybrid; USD 120,000 - 180,000; Full time

Job summary

Arrow Electronics, through its eInfochips unit, seeks an experienced Analog Layout Engineer to design the physical silicon layout for high-speed mixed-signal blocks such as SerDes, ADCs, DACs, and PLLs. The role focuses on floor planning, integration, and meeting stringent timing and reliability requirements.

You will address layout-dependent effects, manage co-design with packaging, and ensure DRC/LVS/ERC compliance along with ESD protection.

Qualifications

• 5 to 12+ years of hands-on IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes (N3, N5, N7).
• Experience at lower nodes (N3, N5) is critical for this position.
• Education: Bachelor's degree in a relevant field.

Responsibilities

• Design the physical silicon layout for high-frequency or high-speed mixed-signal circuits (SerDes, ADCs, DACs, PLLs).
• Floor planning & integration: create block-level and chip-top-level floor plans and manage hierarchical block integration.
• Co-design considerations: micro-bump or package-aware co-design.

Skills

Analog layout

Floor planning

Parasitic control

DRC/LVS/ERC

Layout verification

Education

Bachelor's degree

Job description

Arrow Electronics, through its eInfochips unit, seeks an experienced Analog Layout Engineer to design the physical silicon layout for high-speed mixed-signal blocks such as SerDes, ADCs, DACs, and PLLs. The role focuses on floor planning, integration, and meeting stringent timing and reliability requirements.

You will address layout-dependent effects, manage co-design with packaging, and ensure DRC/LVS/ERC compliance along with ESD protection.