Senior AI-Driven Pre-Silicon Verification Engineer

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Bonus

Equity

Health benefits

401(k) plan with employer match

Employee stock purchase plan

Paid vacation

Paid holidays

Job summary

Cadence Design Systems, Inc. in San Jose, CA seeks a results-driven Pre-Silicon Verification Engineer with deep experience in function verification and a passion for AI-enhanced verification.

You will work on the ChipStack AI Super Agent team to architect and validate verification methodologies for next-generation silicon, collaborating with ML and software engineers to push productivity gains up to 10x. The role requires strong expertise in formal verification and/or simulation/UVM, proficiency

Qualifications

• BS/MS/PhD with relevant experience in pre-silicon verification methodologies.
• 3+ years of hands-on experience in formal, SV/UVM and/or OVM verification.
• Proficient with EDA tools and debugging waveforms and simulation analysis.
• Strong programming skills in Verilog, SystemVerilog and Python.

Responsibilities

• Contribute to improving pre-silicon functional verification using ML techniques.
• Develop agentic AI solutions to accelerate verification processes.
• Use AI-enabled EDA tools to speed design and verification lifecycles.
• Engage with customers to understand requirements and deliver strategies.
• Collaborate with ML and software teams to ensure correctness and quality.
• Stay updated on AI-powered verification advances and share knowledge.

Skills

Verilog

SystemVerilog

Python

Debugging

Communication

Education

Bachelor's, Electrical Engineering or related field

Master's degree in EE or related field

PhD in a relevant field

Tools

Jasper

Xcelium

IMC

Job description

Cadence Design Systems, Inc. in San Jose, CA seeks a results-driven Pre-Silicon Verification Engineer with deep experience in function verification and a passion for AI-enhanced verification.

You will work on the ChipStack AI Super Agent team to architect and validate verification methodologies for next-generation silicon, collaborating with ML and software engineers to push productivity gains up to 10x. The role requires strong expertise in formal verification and/or simulation/UVM, proficiency