Senior AI Accelerator Module Design Engineer - Equity

Meta; Fremont (CA); On-site; USD 144,000 - 204,000; Full time

Job summary

Meta designed hardware platforms powering its AI and HPC infrastructure, seeking an AI Accelerator Module Design Engineer to own board-level electrical design end-to-end. You will manage requirements, package-to-board co-design, and bring-up for MTIA and third-party accelerators.

You will collaborate across ASIC, platform, rack, and systems teams to optimize signal integrity, power integrity, thermal, and cost, driving design fixes to closure in a fast-moving environment.

Qualifications

• BS in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 6+ years of experience in electrical and PCB design for high-speed, high-power digital systems (servers, accelerators, networking, or HPC).
• Experience taking at least one complex custom board or module design from concept through volume production.
• Proficiency with EDA tools for schematic capture and PCB design (Cadence Allegro/OrCAD, Altium Designer, or equivalent).
• Experience with high-speed digital interface design (PCIe, CXL, DDR4/DDR5, HBM, Ethernet 25G+) and SerDes-based channel design.
• Experience with power delivery network design for high-current loads, including DC-DC topology selection and decoupling strategy.
• Experience with board bring-up, debug, and failure analysis using oscilloscopes, VNAs, TDR, and power analyzers.

Responsibilities

• Own the electrical design and PCB implementation of AI accelerator modules for high-performance, high-power custom silicon (MTIA) and third-party accelerators.
• Contribute to module requirements and specifications in partnership with ASIC, platform, rack, and systems architecture teams.
• Execute ASIC package-to-board co-design, including breakout routing, substrate interaction, and escape feasibility analysis for high pin-count devices.
• Design power delivery networks for high-current loads, including DC-DC topology selection, decoupling strategy, and plane/stackup partitioning.
• Implement high-speed interface design across PCIe Gen5/Gen6, CXL, DDR5/LPDDR, HBM, and Ethernet up to 800G, including simulation-guided stackup and channel budgeting.
• Partner with Signal and Power Integrity teams on SI/PI analysis and simulation-to-measurement correlation for your designs.
• Lead board bring-up and debug; root-cause electrical, power, and interoperability failures and drive design fixes to closure.
• Work with ODM/JDM partners through NPI-to-mass-production cycles, holding partners to Meta design standards and schedule.

Skills

High-speed interfaces

SI/PI analysis

Power delivery design

Board bring-up

Signal integrity

Root-cause analysis

Documentation writing

Education

BS in Electrical/Computer Eng

MS in Electrical Engineering (preferred)

Tools

Cadence Allegro/OrCAD

Altium Designer

Ansys HFSS

Keysight ADS/PathWave

Cadence Sigrity

Job description

Meta designed hardware platforms powering its AI and HPC infrastructure, seeking an AI Accelerator Module Design Engineer to own board-level electrical design end-to-end. You will manage requirements, package-to-board co-design, and bring-up for MTIA and third-party accelerators.

You will collaborate across ASIC, platform, rack, and systems teams to optimize signal integrity, power integrity, thermal, and cost, driving design fixes to closure in a fast-moving environment.