Senior AI Accelerator Module Design Engineer

Meta Careers; Santa Clara (CA); On-site; USD 173,000 - 245,000; Full time

Job summary

Meta seeks a senior AI Accelerator Module Design Engineer in Santa Clara, CA to own electrical architecture and PCB design for MTIA-based accelerators. You will drive module requirements, perform package-to-board co-design, and oversee bring-up through mass production with ODM partners.

You will set SI/PI methodologies, lead cross-functional reviews, and mentor PCB engineers while advancing reference designs and advanced substrates for next-gen AI compute.

Qualifications

• Lead engineer for board-level electrical architecture end-to-end.
• Translate system targets into board-level design intent.
• Design power delivery for multi-hundred amp rails.
• Lead high-speed interface and SerDes channel design.
• Collaborate with ASIC, platform, and systems teams.

Responsibilities

• Own end-to-end electrical architecture and PCB design for AI accelerator modules.
• Lead ASIC package-to-board co-design and high-pin-count routing decisions.
• Architect power delivery networks for extreme-current loads.
• Set SI/PI methodologies and correlate simulation with silicon.
• Drive ODM/JDM partners through design to mass production.

Skills

End-to-end arch

PCB design leadership

High-speed interface design

Power delivery networks

Package-to-board co-design

SI/PI simulation

Oscilloscopes/VNAs/TDR

ODM/JDM coordination

HDI/advanced substrates

Education

Bachelor's in Electrical/Computer Engineering

MS or PhD preferred

Tools

Cadence Allegro/OrCAD

Altium Designer

Ansys HFSS

Cadence Sigrity

Keysight PathWave

Job description

Meta seeks a senior AI Accelerator Module Design Engineer in Santa Clara, CA to own electrical architecture and PCB design for MTIA-based accelerators. You will drive module requirements, perform package-to-board co-design, and oversee bring-up through mass production with ODM partners.

You will set SI/PI methodologies, lead cross-functional reviews, and mentor PCB engineers while advancing reference designs and advanced substrates for next-gen AI compute.