Semiconductor Test Development Engineer

OSI Engineering; San Jose (CA); Hybrid; USD 159,300 - 194,700; Full time

Benefits offered by this job

Medical insurance

Vision insurance

401(k)

Job summary

A premier technology firm is seeking a Staff Test Engineer to join their Operations team in San Jose, CA. The role involves defining test plans, designing ATE hardware, and optimizing product lifecycles. Candidates should hold a B.S./M.S. in Electrical Engineering and have experience with Test coverage, Advantest V93k, and effective communication. The position offers a hybrid work model, with three days on-site and two days remote work, along with a competitive salary of up to $177K based on experience.

Qualifications

• B.S./M.S. in Electrical Engineering or equivalent experience.
• Experience with Test coverage and DFT (Scan/ATPG/JTAG/BIST).
• Experience working with local and offshore OSAT's.
• In-depth knowledge of Advantest V93k.

Responsibilities

• Define the Test plan and work with design to ensure good Test coverage.
• Communicate effectively with internal teams, customers, and suppliers.
• Design ATE hardware for NPI support including Load Board and probe card.
• Complete life cycle of products from design to sustaining support.
• Optimize yield, Test time and multi-site count.

Skills

Test coverage

Effective communication

Design ATE hardware

Optimization of yield and test time

Collaboration and problem solving

Education

B.S./M.S. in Electrical Engineering

Tools

Advantest V93k

Redhat

GIT/SVN

Job description

A premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Staff Test Engineer to join our Operations team in San Jose, CA.

This position offers a hybrid work model, with an exception of three days onsite each week and two days remote.

Responsibilities

• Define the Test plan and work with design to ensure good Test coverage.
• Effective communication skills with internal cross functional teams, customers and suppliers.
• Able to design ATE hardware for NPI support, including Load Board, probe card, interface.
• Complete life cycle of products from design, prototypes, high volume manufacturing bring up and RMA/sustaining support.
• Optimize yield, Test time and multi-site count.

Qualifications

• B.S./M.S. in Electrical Engineering or equivalent experience.
• Experience with Test coverage and DFT (Scan/ATPG/JTAG/BIST).
• Experience working with Local and offshore OSAT's.
• Experience and in-depth knowledge of Advantest V93k.
• Experience on Smartest, Redhat and GIT/SVN.
• Ability to independently learn and problem solve.
• Comfort with collaboration, open communication and reaching across functional borders.

Preferred Qualifications

• Experience in DDR and High-speed Digital products preferred.

Location: San Jose, CA

Relocation assistance will be provided and will be based on your current location.

Schedule: 3 days onsite, 2 days remote

Salary: Up to ~$177K (Dependent on experience)

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Semiconductor Manufacturing

Benefits

Medical insurance
Vision insurance
401(k)