Semiconductor Process Engineer Intern: Shape Next-Gen ICs

Keysight Technologies; Santa Rosa (CA); On-site; USD 41,000 - 48,000; Part time

Job summary

Keysight Technologies is seeking a motivated graduate student for a longer-term internship in Santa Rosa, CA. The role focuses on developing advanced semiconductor processes and the integration of compound semiconductor ICs.

You will gain hands-on experience in lithography, deposition, etch, plasma processing, and related wafer fabrication tasks. Ideal candidates are pursuing MS or PhD in relevant engineering fields and have experience with III-V processing, DOE, and SPC.

Qualifications

• Graduate student pursuing MS or PhD in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, Chemistry, or Physics.
• Experience with advanced semiconductor processes and devices; III-V processing preferred.
• Hands-on lab experience in lithography, deposition, etch, plasma processing, electroplating, wafer thinning, dicing, and sort.
• Experience with statistical process control and design of experiments is valued.
• Strong communication and problem-solving skills for cross-group interactions.
• Motivated to meet aggressive product development schedules and manufacturing expectations.

Responsibilities

• Develop the next generation of architecture and heterogeneous integration of Keysight compound semiconductor ICs.
• Contribute to process development in dry etch, PECVD, wet etch, electroplating, lithography, metal deposition, and related fabrication steps.
• Gain knowledge of Keysight's industry, infrastructure, and products through assignment.

Skills

Semiconductor processing

Lithography

Deposition

Etch

Plasma processing

Electroplating

Wafer handling

Design of experiments

Interpersonal skills

Education

MS or PhD in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, Chemistry or Physics

Job description

Keysight Technologies is seeking a motivated graduate student for a longer-term internship in Santa Rosa, CA. The role focuses on developing advanced semiconductor processes and the integration of compound semiconductor ICs.

You will gain hands-on experience in lithography, deposition, etch, plasma processing, and related wafer fabrication tasks. Ideal candidates are pursuing MS or PhD in relevant engineering fields and have experience with III-V processing, DOE, and SPC.