RISCV CPU System RTL Engineer

Qualcomm

Santa Clara (CA)

On-site

USD 142,200 - 213,400

Full time

14 days+

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Benefits offered by this job

Competitive annual discretionary bonus
Annual RSU grants
Comprehensive benefits

Job summary

Qualcomm is seeking talented engineers for RISCV CPU RTL development, focusing on high-performance, low-power devices in Santa Clara, California. You will contribute to architecture and product definition and be responsible for the implementation of various CPU system features.

The ideal candidate should hold a Master’s degree in computer or electrical engineering, with expertise in microprocessor architecture and Verilog or VHDL proficiency. The role offers a competitive pay range and comprehensive benefits.

Qualifications

  • Master’s degree in computer or electrical engineering with 1-3 years of CPU RTL experience.
  • Deep knowledge of microprocessor architecture and RISCV CPU system features.
  • Strong expertise in power management for high-performance systems.

Responsibilities

  • Explore performance and power optimization opportunities.
  • Develop architecture and microarchitecture specifications for RTL design.
  • Collaborate with engineering teams to validate physical design aspects.

Skills

Microprocessor architecture
Power management strategies
Verilog and/or VHDL proficiency
Debug features development
Technical documentation

Education

Master’s degree in computer or electrical engineering
Bachelor's degree in Electrical Engineering

Tools

Simulators
Waveform debugging tools
Scripting languages (Perl or Python)

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group > CPU Engineering

General Summary

We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices. In this role you will contribute to architecture and product definition and be responsible for microarchitecture and RTL execution of CPU system features. These include, but are not limited to: System architecture – configuration access protocols and ordering requirements, timer and interrupt architecture, Power management architecture, Debug and trace architecture.

Required for this Role
  • Master’s degree in computer or electrical engineering with 1‑3 years of experience in CPU RTL or a related field
  • Deep knowledge of microprocessor architecture, with expertise in one or more of the following areas:
    • RISCV CPU system features: timer synchronization, interrupt controller, configuration access protocols, RAS and safety mechanisms
    • Architecture and performance monitoring, telemetry architecture
    • Power management: active and idle power strategies, limit and clock architecture
    • Debug/trace architecture, scan‑dump, and memory dump mechanisms
  • Strong expertise in power management for high‑performance systems, including active power, idle low power, and silicon/system limits
  • Proven experience in defining and developing debug features for high‑performance designs
  • Excellent technical documentation skills, along with strong written and verbal communication abilities
  • Proficiency in Verilog and/or VHDL, and experience with simulators and waveform debugging tools
  • Solid understanding of logic design principles, including timing and power implications
Preferred Qualifications
  • Master’s degree in computer or electrical engineering
  • Familiarity with RISCV CPU architecture and ISA
  • Understanding of low‑power microarchitecture techniques
  • Knowledge of high‑performance design strategies and trade‑offs in CPU microarchitecture
  • Experience with scripting languages such as Perl or Python
Roles and Responsibilities
  • Explore performance and power optimization opportunities in collaboration with the CPU modeling team
  • Develop high‑level architecture and microarchitecture specifications that translate into RTL design
  • Own RTL development: assess and refine RTL to meet power, performance, area, and timing goals
  • Support functional verification: assist the design verification team in executing verification strategies
  • Deliver design: collaborate with cross‑functional engineering teams to validate physical design aspects including timing, area, reliability, testability, and power
  • Work closely with software, firmware, and platform teams to enable CPU system features in products
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of hardware or software engineering experience
  • Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of hardware or software engineering experience
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field
Pay range and Other Compensation & Benefits

Pay: $142,200.00 – $213,400.00. In addition to base salary, qualified candidates may be eligible for a competitive annual discretionary bonus program and annual RSU grants. Comprehensive benefits support employees’ success at work, at home, and in life.

Equal Opportunity Employer

Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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