RISC-V Physical Design Engineer — PPA & Signoff Specialist

ACL Digital

San Jose (CA)

On-site

USD 160,000 - 210,000

Full time

14 days+
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Job summary

ACL Digital is seeking a seasoned Physical Design Engineer to lead the implementation of high-performance RISC-V based processor designs from RTL to GDSII. You will own full-chip and block-level physical implementation, timing closure, power optimization, PPA, and sign-off across domains.

Ideal candidates have 8+ years of block-level PD experience, with hands-on work on EM/IR, power grids, floorplanning, clock-tree synthesis, and sign-off readiness using industry tools.

Qualifications

  • At least 8 years of block-level physical implementation from RTL to GDSII.
  • Experience with EM/IR and power grid optimization for high-current blocks.
  • Experience driving sign-off: DRC, LVS, antenna, ERC, tapeout readiness.
  • Experience in routing-aware floorplanning and clock-tree synthesis with skew management.
  • Proficiency in Tcl, Python, Perl for PD automation.

Responsibilities

  • Own full-chip and block-level physical implementation from RTL to GDSII.
  • Drive timing closure and power optimization to meet PPA targets.
  • Support sign-off activities: DRC, LVS, antenna, ERC, and tapeout readiness.
  • Contribute to and improve physical design automation infrastructure using scripting tools.

Skills

Block-level PD experience
RTL to GDSII experience
Timing closure
Power optimization
PD sign-off
Scripting for PD (Tcl, Python, Perl)
Clock tree synthesis
Floorplanning

Tools

Innovus
ICC2
Calibre
Voltus
RedHawk

Job description

ACL Digital is seeking a seasoned Physical Design Engineer to lead the implementation of high-performance RISC-V based processor designs from RTL to GDSII. You will own full-chip and block-level physical implementation, timing closure, power optimization, PPA, and sign-off across domains.

Ideal candidates have 8+ years of block-level PD experience, with hands-on work on EM/IR, power grids, floorplanning, clock-tree synthesis, and sign-off readiness using industry tools.

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