RFIC Design Intern: High-Impact Silicon RFIC

Skyworks; San Jose (CA); On-site; USD 54,000 - 99,000; Part time

Job summary

Skyworks San Jose Design Center invites you to join as an Electrical Engineering intern focused on silicon RFIC design. You’ll work with mentors on transistor-level circuits, simulations, layouts, and lab evaluation to push high‑performance RF front‑end solutions for mobile applications.

Located in Silicon Valley, the team collaborates across disciplines, offering hands‑on experience, professional networking, and a pathway to a career in RFIC design.

Qualifications

• Currently enrolled in Electrical Engineering BS/MS program.
• In-person Summer internship beginning May/June 2027 (3 months) at San Jose site.
• Familiarity with transistor-level design concepts for silicon RFIC and analog circuits.
• Understanding RF fundamentals including noise, bandwidth, S-parameters, and matching.

Responsibilities

• Work with a mentor and design team on transistor-level RFIC design, simulation, and layout.
• Document results and present technical work to colleagues and stakeholders.

Skills

RFIC design

Cadence Spectre

EMX

RF front-end

Education

EE BS/MS

Tools

Cadence Spectre

EMX

Keysight ADS

Momentum

HFSS

Job description

Skyworks San Jose Design Center invites you to join as an Electrical Engineering intern focused on silicon RFIC design. You’ll work with mentors on transistor-level circuits, simulations, layouts, and lab evaluation to push high‑performance RF front‑end solutions for mobile applications.

Located in Silicon Valley, the team collaborates across disciplines, offering hands‑on experience, professional networking, and a pathway to a career in RFIC design.