RFIC Design Intern

SkyGig; San Jose (CA); On-site; USD 34,440 - 55,104; Full time

Benefits offered by this job

Paid internship

Onsite

Bay Area location

Job summary

SkyGig is seeking a motivated RFIC Design Engineer Intern to support development, simulation, and validation of RF ICs for next-gen wireless and satellite applications. You will work with experienced RFIC engineers on hands-on product development in a fast-paced startup environment.

The ideal candidate is pursuing an MS or PhD in Electrical Engineering with 2+ years in RFIC design, strong fundamentals in RF CMOS/SOI/SiGe, and proficiency with Cadence Virtuoso, Spectre RF, and ADS.

Qualifications

• Pursuing an MS or PhD in Electrical Engineering or related field.
• Strong fundamentals in analog/RF circuit design.
• Experience with RF simulation tools is a plus.

Responsibilities

• Design and simulate RF front-end blocks such as LNAs, mixers, oscillators, PLLs, PAs, VGAs, switches.
• Perform RF simulations including S-parameters, noise figure, gain, linearity, stability.
• Support layout reviews, parasitic extraction, and post-layout simulations.
• Analyze 2.5D/3D EM models and simulation outcomes.
• Collaborate with a cross-functional RF engineering team.
• Prepare technical documents and participate in design reviews.

Skills

RF circuit design

RF/analog front-end design

Circuit simulations

Python

MATLAB

Technical communication

Education

MS or PhD in Electrical Engineering (RF/circuits) or related

Tools

Cadence Virtuoso

Spectre RF

ADS

Parasitic extraction tools

Job description

We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications applications. This internship is ideal for a student with strong fundamentals in analog/RF circuit design who wants hands-on experience working with experienced RFIC engineers on real product development and help push new hardware innovations forward.

Responsibilities

As an RFIC Design Engineer Intern, you will:

• Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers, oscillators, PLLs, PAs, VGAs, switches, etc.

• Perform circuit RF simulations including S-parameters, noise figure, gain, linearity, stability, power consumption, etc.

• Support layout reviews, parasitic extraction, and post-layout simulations.

• Assist in the analysis of 2.5D and 3D EM circuit models and simulation outcomes.

• Work across a cross-functional collaborative team of bright RF engineers.

• Prepare technical documents and reports, and participate in design reviews and brainstorming sessions.

We are considering full-time/ part-time applicants for Fall 2026.

The ideal candidate will have strong technical competency, curiosity, and the ability to take the lead and ownership of a well-defined project. They should also be excited to adapt, learn quickly, and grow in a fast-paced startup environment.

• Currently pursuing a M.S., or Ph.D. in Electrical Engineering with 2+ years of RFIC design experience.

• Strong background in RF state-of-the-art CMOS, SOI, or SiGe technologies

• Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or similar.

• Deep understanding of system specifications and capable of translating system requirements into circuit requirements at IC level.

• Experience with RFIC layout and post-layout simulation.

• Experience with Python, MATLAB, or scripting for data analysis and automation.

• Prior research, or tapeout experience in RF/analog IC design.

• Comfortable working and solving problems independently as well as collaboratively within a team.

• Strong written and oral communication skills in English and comfortable explaining technical concepts to the rest of the team.

• Paid, full-time, onsite internship at our Bay Area, CA location with competitive salary

• Opportunity to work with a collaborative and ambitious team developing disruptive products.

• Opportunities for growth, leadership, and project ownership in a dynamic startup environment.