RF Analog Front-End Architect

Ashton North LLC; Huntsville (AL); On-site; USD 110,000 - 140,000; Full time

Job summary

Ashton North LLC in Huntsville, AL is seeking an RF Analog Design Engineer to develop RF/mixed-signal hardware for rugged embedded computing used in defense, aerospace, and industrial markets. You will collaborate with FPGA, PCB, and software teams to create high-performance RF front-end architectures and low-noise power solutions.

The role encompasses concept through validation and production, with emphasis on RF signal paths, impedance matching, and high-speed interfaces to FPGA-based

Qualifications

• Must have degree in Electrical/Electronic Engineering or related field.
• Expertise designing RF and mixed-signal signal chains, including RF front ends and low-noise power architectures.
• Experience taking RF hardware from architecture to production, debugging and validation.

Responsibilities

• Design RF analog front-end architectures for high-performance embedded computing products for defense/aerospace.
• Design RF signal paths, low-noise analog circuitry, clocking and power architectures with cross-functional teams.
• Lead lifecycle from concept to validation and production, addressing signal integrity issues.

Skills

RF design

Analog front end

Mixed-signal

ADC/DAC interfaces

Clock generation

Power architectures

RFSoC/FPGA interfacing

Troubleshooting

Education

Bachelor's degree in Electrical/Electronics Engineering

Tools

Oscilloscopes

Spectrum analyzers

Network analyzers

PCB design review with RF focus

Job description

Ashton North LLC in Huntsville, AL is seeking an RF Analog Design Engineer to develop RF/mixed-signal hardware for rugged embedded computing used in defense, aerospace, and industrial markets. You will collaborate with FPGA, PCB, and software teams to create high-performance RF front-end architectures and low-noise power solutions.

The role encompasses concept through validation and production, with emphasis on RF signal paths, impedance matching, and high-speed interfaces to FPGA-based