Remote Senior PCB Layout Engineering Lead for AI Hardware

Cerebras

United States

Hybrid

USD 210,000 - 230,000

Full time

14 days+

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Job summary

Cerebras Systems is seeking a senior PCB layout engineer to own multilayer board design for AI hardware. You will translate schematics into constraint-driven layouts and collaborate with cross-functional teams to ensure performance and manufacturability.

The role requires expertise in high-speed routing, BGA escape, signal/power integrity, IPC compliance, and production release packages. Remote-friendly with Sunnyvale proximity; base salary 210k–230k USD, plus bonus/equity potential.

Qualifications

Bachelor's degree in electrical engineering or equivalent practical experience.
10+ years of hands-on experience laying out complex, high-speed multilayer PCBs.
Expertise with Cadence Allegro PCB Designer and Constraint Manager; Altium Designer experience helpful.
Strong knowledge of component placement, controlled-impedance routing, differential pairs, length matching.
Experience with dense BGA escape routing, HDI structures, vias, microvias, and backdrilling.
Working knowledge of signal integrity, power integrity, EMI/EMC, thermal design.
Experience applying IPC standards and fabrication/assembly requirements.
Ability to create and review complete PCB fabrication and assembly release packages.
Ability to thrive in a fast-paced, dynamic environment and adapt to changing priorities.
Excellent collaborative and interpersonal skills with multi‑disciplined teams.

Responsibilities

Own multilayer PCB layout from initial component placement through fabrication and assembly release.
Translate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs using industry-standard PCB layout tools.
Define and implement board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints.
Place and route high-speed digital, high-current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces.
Apply signal-integrity and power-integrity best practices to minimize crosstalk, discontinuities, noise, voltage drop, and EMI.
Collaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers to establish constraints and resolve layout issues.
Work with fabrication and assembly partners to select materials, validate stackups and via structures, and improve yield, cost, and schedule.
Perform design reviews and DFM, DFA, and DFT checks; generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, IPC-2581, and related release packages.
Maintain component footprints, padstacks, design libraries, layout standards, and release documentation.
Support prototype builds, board bring-up, failure analysis, and layout revisions through production.