Remote Lead RTL/FPGA Modem Architect for Space

Aalyria; United States; On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Flexible schedules

Equity options

401(k)

Health, dental, vision, life insurance

Paid time off

Job summary

Aalyria Space seeks a Lead RTL/FPGA Design Engineer to own from architecture to silicon bring-up a high-performance coherent modem for free space optical communications. You will translate DSP models into synthesizable RTL (VHDL/SystemVerilog) and drive DSP blocks, FEC, and high-speed interfaces while optimizing PPA.

You will work with DSP designers, system architects, and firmware teams to ensure robust hardware across power, performance, and area targets, with occasional travel to Mountain

Qualifications

• Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 5+ years of hands-on experience in RTL design for high-speed digital communications or related systems.
• Proficiency in logic design concepts and high-quality RTL coding using VHDL/SystemVerilog.
• Proven experience in micro-architecture definition and delivering detailed design specifications.
• Demonstrated ability to ensure RTL designs are compliant with relevant industry or company standards and specifications.

Responsibilities

• Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.
• Lead the micro-architecture and RTL development for DSP blocks (equalization, carrier and timing recovery).
• Oversee integration of FEC engines and high-speed interfaces.
• Translate DSP models into robust RTL designs with system architects.
• Design fixed-point arithmetic RTL implementations of DSP blocks.
• Ensure design compliance with standards and specifications.
• Apply low power design techniques and perform PPA analysis.
• Verify functionality with test benches and vector matching.
• Support functional verification, debug, and static timing closure.
• Collaborate with firmware/software to define HW/SW partitioning and interfaces.
• Support silicon bring-up and bench testing.

Skills

RTL design

VHDL/SystemVerilog

Coherent modem design

DSP block design

PPA analysis

Hardware-software partitioning

Python scripting

Security clearance eligible

Education

Bachelor’s or Master’s in EE/CE

Tools

VHDL

SystemVerilog

FPGA development

Job description

Aalyria Space seeks a Lead RTL/FPGA Design Engineer to own from architecture to silicon bring-up a high-performance coherent modem for free space optical communications. You will translate DSP models into synthesizable RTL (VHDL/SystemVerilog) and drive DSP blocks, FEC, and high-speed interfaces while optimizing PPA.

You will work with DSP designers, system architects, and firmware teams to ensure robust hardware across power, performance, and area targets, with occasional travel to Mountain