Real-Time FPGA Architect - 3D Camera Video Pipeline

Yewser; El Segundo (CA); On-site; USD 130,000 - 180,000; Full time

Job summary

Yewser is seeking an experienced FPGA engineer to own the real-time image pipeline in a new class of 3D cameras. You will design the logic that moves high‑resolution image data from sensor through the FPGA to the rest of the system, in hardware built for demanding environments.

You will work hands‑on with the board, firmware, and software teams to bring this pipeline up on real hardware and ensure clean timing, sync, and no dropped frames for native 3D content delivery.

Qualifications

• 5+ years FPGA real-time video or imaging experience.
• Expertise with high-speed sensor interfaces (MIPI) and video pipelines.
• RTL skills in Verilog/SystemVerilog and scripting in Python/C.

Responsibilities

• Design real-time video data paths in FPGA with high bandwidth and no dropped frames.
• Bring up hardware and validate timing across multiple clock domains.
• Integrate high-speed networking and 25G+ Ethernet; debug live hardware.

Skills

FPGA development

Real-time video pipelines

Verilog/SystemVerilog

Timing and clock domain management

Python/C tooling

Tools

Vivado

MIPI interfaces

Job description

Yewser is seeking an experienced FPGA engineer to own the real-time image pipeline in a new class of 3D cameras. You will design the logic that moves high‑resolution image data from sensor through the FPGA to the rest of the system, in hardware built for demanding environments.

You will work hands‑on with the board, firmware, and software teams to bring this pipeline up on real hardware and ensure clean timing, sync, and no dropped frames for native 3D content delivery.