Lead FPGA Architect: Real-Time Video Processing (On-Site)

Riccione Resources; Seattle (WA); On-site; USD 170,000 - 210,000; Full time

Job summary

Riccione Resources is seeking a Senior FPGA Engineer (Xilinx) to lead video processing hardware from concept to silicon. You will architect next-generation video technology, building high-performance RTL pipelines and integrating fast interfaces like PCIe and DDR4.

You’ll own clocking, timing, and system-level debugging in a hands-on role. The right candidate brings 8+ years in FPGA design, deep Xilinx Vivado experience, and mastery of Verilog/VHDL for real-time video applications, including 4K

Qualifications

• 8+ years FPGA development with track record of full-stack FPGA solutions.
• Senior-level command of Xilinx architectures and Vivado, timing closure.
• Strong Verilog/SystemVerilog and VHDL expertise.
• Experience with real-time video pipelines and HDMI/DP/SDI standards.
• Ability to architect clocking, multi-clock-domain logic, and AXI interfaces.

Responsibilities

• Own FPGA solution from first line of code to hardware deployment.
• Architect next-generation video tech and scalable RTL designs.
• Develop high-performance video pipelines (scaling, color space, frame rate).
• Integrate high-speed interfaces (PCIe, DDR4, 10GbE) with video IP.
• Define clocking strategies and robust reset logic across domains.
• Perform bench-level bring-up and lab debugging with test equipment.
• Use VHDL and Verilog for modern digital design and RTL.
• Drive timing closure and optimization for high-utilization designs.

Skills

FPGA architecture

Xilinx UltraScale+

Vivado Design Suite

Verilog/SystemVerilog

VHDL

Video processing pipelines

Clocking strategies

High-speed interfaces

RTL debugging

System integration

Education

Bachelor’s or higher in Electrical/Computer Engineering

Tools

PCIe

DDR4

10GbE

Job description

Riccione Resources is seeking a Senior FPGA Engineer (Xilinx) to lead video processing hardware from concept to silicon. You will architect next-generation video technology, building high-performance RTL pipelines and integrating fast interfaces like PCIe and DDR4.

You’ll own clocking, timing, and system-level debugging in a hands-on role. The right candidate brings 8+ years in FPGA design, deep Xilinx Vivado experience, and mastery of Verilog/VHDL for real-time video applications, including 4K