Quality Process Engineer - Semiconductor Manufacturing

Sierra Wireless; Colorado Springs (CO); On-site; USD 75,000 - 107,000; Full time

Job summary

Sierra Wireless in Colorado Springs is seeking an experienced Quality Engineer with expertise in chip-scale packaging and semiconductor backend assembly. This full-time position includes responsibilities in process qualification and quality management to impact product quality directly. Candidates should have 5+ years of experience, a bachelor's degree in a relevant field, and strong skills in statistical analysis and 8D problem-solving methodologies. A salary range of $75,000 to $107,000 USD is offered, based on qualifications and experience.

Qualifications

• 5+ years of quality engineering experience in semiconductor packaging.
• Direct hands-on experience with chip-scale packaging processes.
• Excellent written and verbal communication skills.

Responsibilities

• Support qualification and validation of chip-scale packaging processes.
• Lead corrective action reports using structured root cause analysis.
• Manage supplier non-conformances and corrective actions.

Skills

Quality engineering experience in semiconductor backend assembly

Chip-scale packaging technologies

Statistical analysis skills

8D methodology expertise

Education

Bachelor's degree in Engineering, Materials Science, Physics, or related field

Tools

Statistical analysis software (Minitab, JMP)

Job description

Location: Colorado Springs (Onsite)

Our Team:

Semtech Corporation (NASDAQ:SMTC; www.semtech.com) is a leading supplier of high-quality analog and mixed-signal semiconductor products. Semtech is an organization headquartered in Camarillo, California with 31 offices in 14 countries around the world.

Semtech’s Protection Business Unit is a group of passionate and talented individuals tasked to support the development of industry-leading protection integrated circuits (IC) for high performance analog and mixed-signal semiconductor for high‑end consumer, automotive and industrial end market applications, dedicated to providing customers with high quality proprietary solutions and breakthrough technology.

Job Summary

We are seeking an experienced Quality Engineer with chip-scale packaging (CSP) and semiconductor backend assembly expertise to support our wafer‑level and flip chip manufacturing operations. This role combines hands‑on quality engineering with supplier quality management, focusing on process qualification, device characterization, corrective action leadership, and new product introduction (NPI). The ideal candidate brings deep technical knowledge of semiconductor packaging processes, proven ability to drive quality improvements through data‑driven problem‑solving, and skill in building collaborative relationships across engineering, manufacturing, and supplier organizations. This is a permanent, full‑time position offering the opportunity to directly impact product quality and manufacturing excellence in a high‑reliability semiconductor environment.

Responsibilities

Chip‑Scale Packaging & Process Quality

• Support qualification and validation of chip‑scale packaging processes including flip chip, wafer‑level CSP, die attach, molding, and plating operations
• Conduct statistically rigorous device characterization across process, voltage, and temperature (PVT) conditions to verify performance margins and detect reliability risks
• Design and execute Design of Experiments (DOE) to optimize packaging process parameters, identify critical factors, and improve process robustness
• Apply Statistical Process Control (SPC) methodologies to monitor critical process parameters and process capability (Cpk/Ppk) for packaging operations
• Perform Measurement System Analysis (MSA) and Gage R&R studies to validate inspection and test equipment capability
• Support new product introduction (NPI) through process validation (IQ/OQ/PQ), first article inspection (FAI), and production readiness activities
• Develop and maintain Process FMEAs (pFMEA), Control Plans, and process documentation for packaging operations
• Investigate and resolve quality issues related to packaging processes including solder joint integrity, die cracking, underfill defects, warpage, and assembly yield

Corrective Action & Problem Solving

• Lead corrective action reports (CARs) using 8D methodology and structured root cause analysis (5-Why, fishbone, fault tree analysis)
• Partner with engineering and manufacturing teams to close open CARs through collaborative problem‑solving, ensuring root causes are properly addressed and corrective actions are effective
• Facilitate cross‑functional failure analysis and multi‑factor experiments to identify process sensitivities and root causes
• Track CAR closure progress and provide status reporting to Quality Director and site leadership
• Verify effectiveness of implemented corrective actions through data analysis and follow‑up validation
• Support continuous improvement initiatives using Lean/Six Sigma methodologies and DMAIC problem‑solving

Supplier Quality Management

• Manage supplier non‑conformances (SCARs), corrective actions, and performance improvement initiatives
• Coordinate with suppliers on process change notifications (PCNs), engineering changes, and qualification requirements
• Support supplier business reviews monitoring SPC data, yield trends, and reliability metrics

Quality Systems & Standards

• Support maintenance of ISO 9001 quality management system and transition to IATF 16949 automotive standards
• Participate in internal audits and external certification activities as technical subject matter expert
• Review and approve quality documentation including procedures, work instructions, and process specifications
• Ensure compliance with customer‑specific quality requirements and aerospace/automotive industry standards

Minimum Qualifications

• Bachelor's degree in Engineering, Materials Science, Physics, or related technical field
• 5+ years of quality engineering experience in semiconductor backend assembly or microelectronics packaging
• Direct hands‑on experience with chip‑scale packaging technologies including flip chip, wafer‑level CSP, or advanced packaging processes
• Demonstrated expertise in 8D methodology, root cause analysis (5-Why, fishbone, fault tree), and structured problem‑solving
• Strong statistical analysis skills including SPC, process capability (Cpk/Ppk), hypothesis testing, and Design of Experiments (DOE)
• Working knowledge of AIAG Core Tools: PFMEA, Control Plans, MSA, PPAP, and APQP
• Experience with ISO 9001 or equivalent quality management systems
• Proficiency with statistical analysis software (Minitab, JMP, or equivalent) and Microsoft Office suite
• Excellent written and verbal communication skills with ability to influence across organizational levels
• Proven track record of building collaborative relationships with engineering, manufacturing, and supplier organizations

Desired Qualifications

• Master's degree in Materials Science, Engineering, or related technical field
• Six Sigma Green Belt or Black Belt certification
• Certified Quality Engineer (CQE) or Certified Quality Auditor (CQA) from ASQ
• ISO 9001 or IATF 16949 Lead Auditor certification
• Experience with wafer fabrication processes (etch, PVD, lithography, thin films) to support packaging integration
• Direct experience with flip chip bumping, redistribution layer (RDL) processes, or advanced wafer‑level packaging
• Supplier quality experience with OSATs (Outsourced Semiconductor Assembly and Test) or foundries
• Familiarity with automotive (IATF 16949), aerospace (AS9100), or medical device (ISO 13485) quality standards
• Experience with reliability testing including temperature cycling, HAST, HTOL, and failure analysis techniques
• Knowledge of semiconductor metrology and characterization techniques (SEM, X‑ray, C‑SAM, profilometry)
• Advanced DOE expertise including fractional factorial, response surface methodology, and Taguchi methods
• Experience with MES systems and quality data management platforms

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job‑related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

We are proud to be an EEO employer M/F/D/V. We maintain a drug‑free workplace.

A reasonable estimate of the pay range for this position is $75,000 to $107,000 USD. There are several factors taken into consideration in determining base salary, including but not limited to: job‑related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.