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Applied Materials, Inc. in Santa Clara, CA is seeking a Process Engineer E4 to design, optimize, and characterize manufacturing processes for display and semiconductor technologies.
You will collect data, analyze results, and document findings while supporting wafer fabrication across multiple projects. The role requires 7–10 years of experience in process engineering and strong expertise in PVD/ECD, CMP, and CMOS interconnects.
Applied Materials, Inc. in Santa Clara, CA is seeking a Process Engineer E4 to design, optimize, and characterize manufacturing processes for display and semiconductor technologies.
You will collect data, analyze results, and document findings while supporting wafer fabrication across multiple projects. The role requires 7–10 years of experience in process engineering and strong expertise in PVD/ECD, CMP, and CMOS interconnects.