Principal Platform Security Architect (RoT & OTA)

Neurophos; Sunnyvale (CA); On-site; USD 180,000 - 280,000; Full time

Benefits offered by this job

Health coverage

Unlimited PTO

401(k) with stock options

Voluntary benefits

Job summary

Neurophos is seeking a Principal Platform Security Architect to own platform security across our EIC and T100 system. This product security role bridges RTL designers and firmware engineers, ensuring verifiable silicon with root-of-trust, secure boot, device attestation, and signed firmware updates.

The ideal candidate ships RoT subsystems, understands datacenter compliance, and leads security reviews with hyperscalers. Join a team pioneering silicon photonics for AI hardware.

Qualifications

• Shipped hardware/firmware security architectures.
• Experience with root-of-trust IP provisioning and OTP planning.
• Knowledge of secure boot and firmware resiliency requirements (NIST SP 800-193 class).
• Ability to write security specs for design/firmware teams.
• Excellent communication and defender of architectural decisions.

Responsibilities

• Own platform threat model and security architecture end-to-end from fab to deployment.
• Architect RoT integration, provisioning, fuse/OTP strategy, and debug authorization.
• Define secure/measured boot chain and firmware resiliency.
• Oversee device attestation using SPDM and DICE identities.
• Define OTA firmware updates with anti-rollback protection.
• Specify telemetry for datacenter operators and drive security compliance.
• Own key management lifecycle and manufacturing/field processes.
• Lead outsourced RoT sub-system engagements and security reviews.
• Collaborate with design, firmware, and systems teams to land security requirements.

Skills

Security architecture

Root-of-trust design

Firmware security

Hardware security

RTL/firmware communication

Security review facilitation

Education

BS/MS/PhD in Computer Science or Electrical Engineering

Tools

SPDM

DICE

MCTP

PLDM

Job description

Neurophos is seeking a Principal Platform Security Architect to own platform security across our EIC and T100 system. This product security role bridges RTL designers and firmware engineers, ensuring verifiable silicon with root-of-trust, secure boot, device attestation, and signed firmware updates.

The ideal candidate ships RoT subsystems, understands datacenter compliance, and leads security reviews with hyperscalers. Join a team pioneering silicon photonics for AI hardware.