Principal PCIe & SSD Validation Architect

Micron Technology, Inc.; San Jose (CA); On-site; USD 204,000 - 347,000; Full time

Job summary

Micron Technology, Inc. is seeking a Principal PCIe Application Engineer to lead ASIC validation from pre-silicon FPGA development through production release.

You will develop validation plans for functional, performance, power, and reliability across PCIe/NVMe interfaces. The role requires 10+ years in ASIC/SoC validation or SSD controller development, with strong Python/Perl/Shell skills and FPGA/post-silicon experience.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 10+ years of experience in ASIC/SoC validation, SSD controller development, storage systems, firmware development, or related technologies.
• Strong knowledge of SSD controller architecture, system-level validation, and high-speed interfaces including PCIe, NVMe, DDR, and NAND/ONFI.

Responsibilities

• Lead ASIC validation activities from pre-silicon FPGA development through product qualification and production release
• Develop and implement validation plans covering functional, performance, power, reliability, and system-level testing
• Perform post-silicon bring-up, debug, and root-cause analysis across PCIe, NVMe, DDR, NAND/ONFI, and firmware subsystems
• Build automation frameworks, validation tools, and test infrastructure to improve efficiency and coverage
• Provide technical leadership, mentor engineers, and drive teamwork across global multi-functional teams

Skills

Python, Perl, Shell scripting

FPGA validation

Post-silicon bring-up

ASIC verification

Problem solving

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field

Job description

Micron Technology, Inc. is seeking a Principal PCIe Application Engineer to lead ASIC validation from pre-silicon FPGA development through production release.

You will develop validation plans for functional, performance, power, and reliability across PCIe/NVMe interfaces. The role requires 10+ years in ASIC/SoC validation or SSD controller development, with strong Python/Perl/Shell skills and FPGA/post-silicon experience.