Principal Microelectronics Architect

Jobtailor; United States; On-site; USD 180,000 - 240,000; Full time

Job summary

Jobtailor seeks a senior technical leader to shape secure, cloud-enabled microelectronics design environments and guide long‑term IP strategies across government, industry, and research partners.

You will assess IP portfolios, manage third‑party IP, establish standards for reusable IP repositories, and drive interoperability across toolchains, foundries, and packaging while communicating complex concepts to executives and program leadership.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or a related technical discipline.
• 10+ years in microelectronics design, semiconductor development, FPGA design, or SoC architecture.
• Deep understanding of silicon IP development, integration, validation, and reuse methodologies.
• Experience evaluating and managing third‑party intellectual property within complex hardware environments.
• Familiarity with industry‑standard Electronic Design Automation (EDA) tools, including Cadence, Synopsys, Siemens EDA.
• Understanding of cloud‑enabled design environments and collaborative engineering workflows.
• Strong knowledge of semiconductor design processes and technology development lifecycles.
• Exceptional technical writing, documentation, and presentation skills.
• Ability to communicate complex technical concepts to both engineering teams and executive leadership.

Responsibilities

• Serve as a trusted technical advisor for secure, cloud‑enabled microelectronics design environments.
• Provide expertise in semiconductor design methodologies and IP reuse.
• Guide architectural decisions for scalability, interoperability, and sustainability.
• Develop and validate standards for reusable design IP repositories.
• Establish best practices for secure integration and lifecycle management of IP assets.
• Assess risks, licensing, and sustainability of IP portfolios.
• Support governance strategies for IP sharing and collaboration.
• Evaluate and optimize semiconductor design workflows across engineering environments.
• Support integration of foundry‑qualified design flows and advanced packaging.
• Promote interoperability across vendors, toolchains, and platforms.
• Identify opportunities to accelerate development and productivity.
• Conduct technology evaluations and produce technical assessment reports.
• Deliver recommendations on design infrastructure and ecosystem scalability.
• Support milestone reviews and briefings to leadership.
• Contribute to strategic roadmaps for program growth.
• Coordinate requirements across government, industry, research, and engineering teams.
• Facilitate collaboration among stakeholders in semiconductor design, fabrication, packaging, testing.
• Build consensus around standards and technical direction.

Skills

FPGA design

SoC architecture

silicon IP development

cloud-enabled design

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Cadence

Synopsys

Siemens EDA

Job description

Responsibilities

• Serve as a trusted technical advisor supporting the development of secure, cloud‑enabled microelectronics design environments.
• Provide expertise in semiconductor design methodologies, silicon IP reuse, and design ecosystem modernization.
• Guide architectural decisions that support long‑term scalability, interoperability, and sustainability.
• Develop and validate standards for managing reusable design IP repositories.
• Establish best practices for secure integration and lifecycle management of commercial and government‑developed IP assets.
• Assess technical risks, licensing considerations, and long‑term sustainability of IP portfolios.
• Support governance strategies that promote efficient IP sharing and collaboration.
• Evaluate and optimize semiconductor design workflows across modern engineering environments.
• Support the integration of foundry‑qualified design flows and advanced packaging technologies.
• Promote interoperability across multiple vendors, toolchains, and semiconductor platforms.
• Identify opportunities to accelerate development timelines and improve engineering productivity.
• Conduct technology evaluations and produce technical assessment reports.
• Deliver recommendations related to design infrastructure, tool interoperability, and ecosystem scalability.
• Support milestone reviews and provide technical briefings to program leadership and stakeholders.
• Contribute to strategic roadmaps that support future program growth and modernization efforts.
• Coordinate requirements and technical activities across government organizations, industry partners, research institutions, and engineering teams.
• Facilitate collaboration among stakeholders focused on semiconductor design, fabrication, packaging, and testing.
• Build consensus around standards, processes, and technical direction.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline
• 10+ years of experience in microelectronics design, semiconductor development, FPGA design, or System‑on‑Chip (SoC) architecture
• Deep understanding of silicon IP development, integration, validation, and reuse methodologies
• Experience evaluating and managing third‑party intellectual property within complex hardware environments
• Familiarity with industry‑standard Electronic Design Automation (EDA) tools, including Cadence, Synopsys, Siemens EDA
• Understanding of cloud‑enabled design environments and collaborative engineering workflows
• Strong knowledge of semiconductor design processes and technology development lifecycles
• Exceptional technical writing, documentation, and presentation skills
• Ability to communicate complex technical concepts to both engineering teams and executive leadership.